STM32F power supply sequencing with 5-volt tolerant pins

Question

The STM32F427 is powered by 3.3V but many of it's pins are 5V tolerant. This allows external chips to drive it's logic I/O pins at 5V without damaging the device.

I have a board design with at STM32F427 that operates off of two voltage supplies: 3.3V and 5V. The 3.3V regulator is daisy chained off of the 5V regulator which means that the 5V logic comes up before the processor. I currently have a dual-supply buffer (TXS0108E) between the 5V logic ICs and the processor to prevent the processor pins being driven before power is applied.

Is this protection necessary? Can I safely remove the buffer to reduce the complexity? I don't see a lot in the reference manual about power supply sequencing.

Answer 1

The 5V tolerant means you can use pull-ups in the open drain configuration, and doesn't work with push pull. This means you could possibly use a pull up to 5V and open drain, keep in mind that this method can be slower if you have too much capacitance on the digital line, the RC time constant will need to be calculated.

This means if you remove the buffer, you'll need a pull up and the speeds will probably be reduced more than your design needs.

In my designs with the STM32F4, I usually stick with a buffer and push pull for fast speeds. If the design also calls for level translation, I'd stick with the TXS0108E.

EDIT: If your using the GPIO's STM32F4 as inputs, then I would consider how much current the input can be sourced. It must not exceed 5mA.

The datasheet explicitly states that the power must not exceed Vdd+4V. If the peripheral is at 5V and the Vdd is at 0V, then technically you would be violating the absolute maximum ratings. The question is: why? The protection diode turns on, heats up and burns out, potentially putting the input transistors at risk.

This is where I personally might thumb my nose at the datasheet. I don't know if I would recommend other people doing this, but if I were doing this myself, I would be comfortable limiting the current sufficiently with series limiting resistors on the inputs to prevent excess current from reaching the diode. The datasheet also states that no more than 5mA into the input port max. So if the peripheral speed could support a 200Ω series limiting resistor then you might be able to ditch the TXS0108E for a series limiting resistor of more than 200Ω.

Another thing to think about, if the supplies only take a short time, maybe under 1ms to come up. Then the time that the input protection diode would experience any current would be short, and it would also be fine.

Source: www.st.com/web/en/resource/technical/document/datasheet/DM00037051.pdf

Answer 2

From my understanding, the 5V tolerant domain is generated by an internal charge pump which runs from the internal regulator (presumably).

So I'm not sure how what will happen if you drive a pin with 5 V if the device is unpowered otherwise.

One could argue with the absolute maximum ratings table: the input voltage specification for a FT pin (five Volt tolerant) is Vdd + 4.0 V. Your device is unpowered, so Vdd is 0 V and thus the maximum applied voltage allowed would be 4.0 V, which is less than 5 V. But I think that formula actually only holds if the device is running - before that I'd say it's worse.

So I wouldn't reduce the complexity in this case.

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Because of all the negative feedback: I was not trying to imply, that the pins can output 5 V. The protection diodes of 5 V tolerant pins are working against an internally generated voltage, which makes the pin 5 V tolerant.

This is shown clearly in the reference manual and the potential is denoted as \$V_{DD\_FT}\$.

It can also be clearly seen, that the internal pull-up works against \$V_{DD}\$ as well as the push-pull stage of the pin works against the supply rails and not against the five-volt tolerant domain.