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Here I am taking an example of common source configuration(refer figure). Generally head current source is used as load with nMOS and tail cuurent source with pMOS. Why can't be this other way around? I wanted to know the reason behind this.

Thank you enter image description here

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  • \$\begingroup\$ Hint, what voltage do we normally consider to be the voltage that controls the MOSFET operation? \$\endgroup\$ – The Photon Aug 19 at 18:00
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    \$\begingroup\$ If they were the other way around then they'd be source-followers, not common-source. \$\endgroup\$ – brhans Aug 19 at 18:50
  • \$\begingroup\$ @ The Photon, its gate voltage \$\endgroup\$ – Ganesh Prasad B K Aug 20 at 3:12
  • \$\begingroup\$ @GaneshPrasadBK, that's not quite right. I'd say the controlling voltage is the gate-to-source voltage, not just the gate voltage. If you only consider the gate voltage then it means you're expecting the FET behavior to change when you change your reference voltage, which you know is not what really happens. \$\endgroup\$ – The Photon Aug 22 at 22:38
  • \$\begingroup\$ In both cases, the load is connected to the drain. The source is connected to a fixed voltage (ground or 'Vdd'). \$\endgroup\$ – Spehro Pefhany Aug 22 at 22:50
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In single device amplifier topolpgy the term "common XX" means terminal XX is at AC ground. Various biasing techniques may end up with terminal XX with a DC voltage, but they will be AC ground or "common". As a current source has infinite impedance it makes no sense to place it between the common terminal and ground (in the AC analysis circuit) In the above circuits VDD would be assumed to be a voltage source referenced to ground (the triangle symbol) and hence AC ground.

Another way to think of it is that for common source configuration, the load ( a current source in this case) is in the drain circuit.

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