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I want to study the stability of my op-amp circuit with LTspice. I found this video as tutorial: tutorial on phase margin
I did the simulation with closed and open loop as suggested and got the following plots:
Closed loop:
And in open-loop as used in the video tutorial:
How to read those plots and conclude if my circuit is stable or not?
0.3 V pulse response:
Open loop chart with view of 0 dB point:
I believe your plots are reversed. The top plot is the closed-loop response (but of the whole amplifier, including the input blocking cap). The second plot is the open-loop response -- and you should extend the frequency range to catch the point where the gain is 0dB, so you can see the phase at that point.
Note that this has been corrected -- see "Update 3", above.
You are looking for (and trying to avoid) the point where the open-loop gain is equal to exactly 1* -- this is the point in the second plot where the amplitude of the gain is 0dB (0dB = 1) and the phase is 0 degrees.
Your gain margin is the amount the gain would have to change at at 0 degrees of phase shift to get 0dB of gain (i.e., loop gain = 1). Your phase margin is the amount the phase would have to change at 0dB of amplitude gain to get 0 degrees of phase shift (again, loop gain = 1).
From the OP: "For 0db gain, phase is 41° (1.77MHz) and for phase 0°C, gain is -6.51 dB (3.16MHz)." This means that the phase margin is 41 degrees (which is a bit tight -- 60 degrees is generally considered safe for control systems involving mechanical parts) and 6.5dB (which is fine in almost anyone's book).
* Note that this whole "loop gain = 1" thing can get confusing, because in most control systems analysis, there's a summing junction in the loop that isn't taken into account in the analysis -- in that circumstance it's a "loop gain" of -1 that you're trying to avoid, not loop gain = 1.
From https://payhip.com/b/5Srt ("Preview" button in the top right corner, chapter 1.5.1 on page 29):
"AC characteristic is a must. It says whether your design is stable, that is, no oscillations present when the feedback loop is closed. The easiest way to obtain the AC characteristic is to break the loop using a large inductor and to connect a large capacitor to the negative input as presented in Fig. 1.24:"
Typical AC characteristic plot with marked important points:
The opamp is stable if gain drops to 0 dB (the bandwidth in the above picture) while phase margin is above 0 degrees. In the above picture, the phase margin is almost 90 degrees for the gain equal to 0 dB (the bandwidth). In analog CMOS IC design, the rule of thumb is to design in such a way that the phase margin is at least 60 degrees.
