Flash: NOR and NAND
Both NOR and NAND flash use a floating gate to store data. The difference between them is a trade-off of density and speed vs. reliability.
Floating Gate Structure:
From here: https://searchstorage.techtarget.com/definition/floating-gate
A more detailed description of Flash here: https://www.embedded.com/design/prototyping-and-development/4460910/Flash-101--NAND-Flash-vs-NOR-Flash
NOR has slow write times and fast read, with endurance of about 100,000 read/write cycles. It does however have long retention and high read reliability, because it uses large floating gate cells, making it suitable for nonvolatile critical storage, such as boot code. It also supports random read access, much like an EPROM or EEPROM.
NAND has roughly equal read/write times. Like NOR flash, NAND has limited endurance, ranging from about 50,000 cycles for SLC NAND, to as low as 5,000 for TLC NAND. It uses much smaller storage cells than NOR to achieve the increased speed and density. But this comes at a cost of endurance and reliability. As a consequence, NAND requires error correction and wear-leveling to mitigate this shortcoming, making its use more complex. SD cards and eMMC for example include a controller to implement these functions; bare NAND relies on an external SSD controller as either a separate chip or as software on the host processor.
This ECC and wear-leveling overhead, and the block-oriented nature of NAND flash, add considerably to its access latency, which is tens of microseconds compared to tens to hundreds of ns for NOR flash.
Now, what's this business about Flash endurance? Remember that both NOR and NAND use a floating gate to store information. The floating gate is erased and set by injecting a higher voltage to force the gate to the desired state. This hot carrier injection eventually wears out the gate, to the point where it will no longer reliably store a '0' or '1'. NAND floating gates are smaller than NOR, so they need less time than NOR for the erase / set operation. But this also means they are less durable than NOR.
RAM: DRAM and SRAM
RAM has two major types today: static RAM (SRAM), which uses a latch-type structure per cell, and Dynamic RAM (DRAM) which uses a capacitor per cell.
DRAM has high read and write throughput and no endurance limits. It has a multiplexed address and a two-step access process (row, then column) and so favors block-oriented access due to its latency. It also requires that the cells be ‘refreshed’ from time to time to retain their contents, and also to be written back after reading. This is because the capacitor used to store charge will leak off with time, and is also discharged when it’s read.
SRAM has a non-multiplexed address; access is in one step. So not only does SRAM have high thoughput, it has low latency. As it doesn't require refresh or write-back it can potentially be low power, too, although like any logic, power is often traded off for speed.
Both SRAM and DRAM are volatile, losing their contents if power is lost.
A slow SRAM can use almost no power when idle, and can be made nonvolatile with a standby supply like a battery. Fast SRAM will have more leakage power consumption - you would find this type used as CPU buffer or cache memory for example. DRAM can be placed into a power-saving self-refresh mode, but will still consume some power even when not in use.
Where Do You Use Each Type, And Why
Each type has a trade off.
- NOR is nonvolatile and has very low read error rates, so it’s well suited for critical low-level boot code when error correction is impractical and long retention is required.
- NAND requires error correction and wear leveling, but its density and non-volatility make it a good medium for system code, user apps and persistent data. It has longer latency than NOR, DRAM or SRAM, but shorter than rotating disk, making it an increasingly-popular option to complement or replace hard disk.
- DRAM has good speed and no wear issues, so it can handle high writing workloads that would quickly wear out Flash. It works well as main working storage and swap memory, but has latency (on the order of 50 - 100ns) that favors block access over truly random I/O. DRAM can be shadowed to NAND or hard disk for shorter wake-up time from power-down.
- SRAM has the lowest latency of all the memory types so it’s the best choice for performance-critical storage like CPU buffer and cache. It is however the least dense, and in performance applications uses the most power per unit storage.
On the horizon are potential replacements for Flash, SRAM and DRAM. These include MRAM, which uses magnetic ‘spin’ to store bits, and ReRAM which uses a new circuit element called a memristor to store bits. Both are nonvolatile and static (not needing refresh). So far neither has met the performance or cost of flash or DRAM in commercial application, but work continues and holds promise to revolutionize memory architecture.