# Understanding a dual op amp integrator circuit

I've come across this part of a circuit from a precision multi-slope ADC, it is described as a "Dual op amp integrator", but I am left confused as to what U11 accomplishes in this circuit,

This part of the circuit is switched between an external input voltage and either a positive of negative reference voltage at about 50KHz, apparently done to use a much smaller integration capacitor, and have more residue resolution, this is just to give an idea of how it is used.

simulate this circuit – Schematic created using CircuitLab

My goal is working out how each component in this circuit influences the total noise, and what frequency bands of external and internal noise it is susceptible to,

I am very limited when it comes to simulation knowledge, and have so far been deriving the relationship of what the AC gain vs frequency is of each part of the circuit moving forward, however without knowing exactly what this circuit accomplishes, I've been struggling with it.

My first thought was increasing the gain of the circuit, with U11 contributing about x16000, and U2 contributing x1000000 however this seems a little overkill, as U2 on its own could saturate on only 15uV difference across its inputs.

Second thought was some kind of sallen key low pass, that some how relied on parasitic capacitance, but every calculation for that I could find had results far above the gain bandwidth product.

The other thought was to reduce the offset voltage of U2, but in a part of the circuit where noise is critical, it seems odd.

• I guess it is a wrong schematics. Commented Aug 23, 2019 at 12:49
• Your feedback loops are all positive feedback in the simulation. This is wrong.
– Bort
Commented Aug 23, 2019 at 12:59
• Thank you, corrected that, That was just an error from me recreating it here, Commented Aug 23, 2019 at 13:04

The amplifier U11 drastically increases the open-loop gain of the circuit. As a result, the low-frequency error of each opamp based inegrator (due to the limited open-loop gain Aol of an opamp) is shifted to smaller frequencies.

That means: The lower cut-off frequency fc (where the desired 20 dB drop starts) is much lower. Example:

• One opamp with Aol=1E4 and R=1k, C=1µF, fc=10 mHz

• Two opamps with Aol=1E4 and R=1k, C=1 µF, fc=1E-6 Hz

Comment 1: The resistive divider at the output of U11 has nearly no influence on the cut-off. The divider has the task to reduce/adjust the gain of the first opamp to ensure stability against oscillations.

Comment 2: Without the external elements R and C the shown opamp combination is one of the classical dual-opamp circuits for gain enhancement (composite amplifier). Such a combination is used not only for gain increase. Sometimes such a structure is used to combine the good offset properties of a voltage-controlled opamp with the excellent slewing properties of a current-feedback amplifier (CFA).

Ref: Sergio Franco, "Design with opamps and...", chapt. 8.6.

• Thank you, had to wrap my head around how exactly you ended up with those numbers, but now I understand, would mean this circuit has a cut off frequency with a period of over half a year. so in line with my original confusion, but at least now I can calculate it, ~(6E-8 Hz), Commented Aug 24, 2019 at 1:25