I have read something about
CLUs (Carry lookahead units) and want to build one. I have settled on design using
eeproms as adders and
CLU. On the picure below you can see a schematic CLu implementation. In my version i think the best would be to swap the schematic blocks by an
EEPROMs. ( One
EEPROM per adder and one for the
CLU, there are plenty chips available for this format)
But the more i looked at it it seems that we will create some sort of an oscillator.
Let me explain.
Lets assume that one eeprom has
200us (just for example) delay before the data on the output becomes valid. Meanwhile the output can be "whatever" it wants. But in that time, the outputs of the CLU eeprom are sending back to individual adders their Carry in signal. so if that signal changes, the output changes and again, we have
200us delay before the data becomes valid. So that means the individual adder can change its outputs (Propagate and Generate) And that completes the circle back to the CLU and it loops again. So we have basically an oscillator.
Am i right? I yes, how can we make it otherwise than to latch it and wait for next clock cycle?