The Intel 8080 is a classic microprocessor released in 1974, fabricated using an enhancement-mode NMOS process, and shows various unique characteristics related to this process, such as the requirement of a two-phase clock, and three power rails: −5 V, +5 V, and +12 V.
In the description of the power pin from Wikipedia, it says
Pin 2: GND (VSS) - Ground
Pin 11: −5 V (VBB) - The −5 V power supply. This must be the first power source connected and the last disconnected, otherwise the processor will be damaged.
Pin 20: +5 V (VCC) - The + 5 V power supply.
Pin 28: +12 V (VDD) - The +12 V power supply. This must be the last connected and first disconnected power source.
I cross-referenced to the original datasheet, but the information is a bit contradictory.
VCC (+5 V), VDD (+12 V) and VSS (GND) with respect to VBB (−5 V): −0.3 V to +20 V.
Even if VBB is 0 V when it's unconnected, VDD would be +17 V, and it shouldn't exceed the absolute maximum. Is it the original claim on Wikipedia that a Intel 8080 chip be destroyed if +12 V is connected before −5 V correct?
If it is correct, what is the exact failure mechanism if I do this? Why would the chip be destroyed if +12 V is applied first without −5 V? I suspect it must has something to do with the enhancement-mode NMOS process, but I don't know how semiconductors work.
Could you explain how the power supply is implemented internally inside Intel 8080? Did the problem exist among other chips in the same era built using a similar process?
Also, if I need to design a power supply for the Intel 8080, let's say using three voltage regulators, how do I prevent damages to the chip if +12 V rail ramps up before −5 V?