# Help to determinate stability of Opamp Circuit

I have background in software but this time I need to build a circuit for scaling a signal from 15 to -15 VDC. At college I took some subjects on Electrical topics so I have read to remember, after that I finished with the next design:

I selected a Rail to Rail Opamp taking as reference the input voltage, slew rate and GBW = 1.1 MHz, my signals to amplify are square waves of maximum 1 KHz, the design is based on the next assumptions:

1) Voltage follower to match impedance.

2) Amplifier stage with G = 0.5 and I have added a capacitor of 180 pF to act as a low pass filter with cut frequency of around 177 Khz with this I have bandwidth to pass the enough harmonics for square waves and filter high frequencies.

3) Inverter again the signal.

However I am aware that stability is important when we work with Opamps but I don't remember how to interpret a bode plot. For this analysis I cut the amplifier portion of the design and got the bode plot without the capacitor, normal configuration for an inverting amplifier:

I got the next bode plot:

When I plot the response with the capacitor I got something different:

My questions are the next:

Is my procedure of only cutting the middle part of the design to analyze the signal ok? I am assuming that the other 2 circuits are stable due the gain is 1.

Is my circuit stable and suitable for my purposes?

Sorry if these are basic questions but Electrical Engineering is not my best skill, I hope you can help me to solve my doubts.

• What is the signal source in your real system? Commented Sep 3, 2019 at 16:01
• Hi thanks for your reply, it is normally high side drivers outputs connected to motors or resistive loads, the intention of my circuit is to be a signal conditioning to measure the voltage supplied to these loads and connect the output to a data acquisition system. Commented Sep 3, 2019 at 16:12
• I'd guess your design is heavily over-engineered. A simple voltage divider with a capacitor in parallel with the lower leg would probably work adequately. Follow with a voltage follower if necessary. But I don't know your complete requirements, so I can't be sure, of course. Commented Sep 3, 2019 at 16:15
• Taking my proposed solution with the opamp configuration and the gain = 0.5 would be the design stable? I place a voltage follower because output impedance of the source could be different and with the last inverting stage I get a low output impedance. Commented Sep 3, 2019 at 16:21
• Almost certainly (based on the datasheet showing it's a unity-gain-stable op-amp). But you're not wrong to do the analysis and check the phase or gain margin for your specific feedback configuration. Commented Sep 3, 2019 at 16:23

The gain should go to zero before the phase goes to -180 deg: Source: https://microchipdeveloper.com/asp0107:phase-gain-margin

The more gain and phase margin you have the better stability you will have. The problem is when you have gain and -180deg of feedback you get positive feedback and positive feedback is no longer predictable. (Engineers tend to dislike things that aren't predictable)

• Hi Voltage Spike so when I plot the circuit without capacitor for the inverting amplifier based on your explanation would be the circuit stable? Commented Sep 3, 2019 at 19:42
• Yep, gain crosses 0 before phase hits -180. Commented Sep 3, 2019 at 19:42
• Sorry I am confused, for your answer are you talking about the first plot picture (With the cursors) or the second without them? In the first I see phase crosses -180 on X=-1.1 other question is if am i ok by removing the voltage follower and last stage both with gain 1 of the analysis? Thanks in advance Commented Sep 3, 2019 at 19:51
• For your graph (the last one), gain crosses zero (in frequency) before phase hits -180. Remove the voltage follower and check the graphs again, it shouldn't change much. meta.stackexchange.com/questions/126180/… Commented Sep 3, 2019 at 20:03

For stability analysis, you should break the feedback loop as you have done. To interpret the results, please consider the following criterion:

When the gain is zero, the phase should be positive and greater than 45 degrees, indicating a positive phase margin. For example, in the attached stable circuit result, we have a phase margin of 61 degrees, demonstrating system stability.

Another method to check stability is to supply the circuit with a step voltage input source and analyze the overshoot in the output. A higher overshoot indicates a lower phase margin: