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I have a circuit design makes a button latch on-off and drive a mosfet. When I energize the circuit Vout that drives thr mosfet is initially low.

After pressing the button, the button state changes and the mosfet turns on. If I disconnect the enery from source while mosfet turn on state so "output of latch circuit is high", Vout starts from high level if I connect source again. However, if I disconnect the energy while output is low, Vout starts low if connect energy again. My design must be start always low latched when disconnect energy from circuit no mattter what Vout is.

I didn't understand C12,C11 and resistor connected these two capacitor what does, but these components are so important. Tell me best values for these capacitors and its reason. enter image description here

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    \$\begingroup\$ Can you make the schematic more readable? It is very convoluted. \$\endgroup\$
    – Lior Bilia
    Sep 6, 2019 at 10:34
  • \$\begingroup\$ i'm using paint to convert an image from the pdf but dont know how to convert good image size for here. Can u inform me about this ? @LiorBilia \$\endgroup\$
    – IHK
    Sep 6, 2019 at 11:31
  • \$\begingroup\$ Best thing is to use the embedded schematic drawing tool here at EE.SE. It's the button in the editor menu that looks like a schematic. \$\endgroup\$
    – Ariser
    Sep 6, 2019 at 14:40
  • \$\begingroup\$ okey i ll try next time ty. \$\endgroup\$
    – IHK
    Sep 6, 2019 at 14:48
  • \$\begingroup\$ have you tried copying the image in the PDF document using your computer? \$\endgroup\$
    – jsotola
    Sep 6, 2019 at 17:09

2 Answers 2

Reset to default
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U2a's output feeds back to its input through the opto coupler. There are very high resistance values of 1M and 4.7M ohm with capacitors in parallel. This indicates to me that these are for timing and is either for a one-shot or oscillator. So when U2a input is low, the output is high which turns on NPN U4 which provides power to the opto-coupler input. The opto output turns on and drives U2a input high so U2a output goes low and NPN U4 turns off. When U2a output is low the capacitors discharge through the resistors, U2a input goes low and its output goes high, etc. U10 seems to be a reset as it kills power to the Quad NAND gate. It is a very strange circuit.

Thanks for the info about the switch. When the circuit powers up C11 is discharged and the MOSFET is off. When the switch is closed, C11 is charged and the MOSFET turns on. After releasing the switch, C11 discharges through R24. When voltage falls below the threshold of U2a the MOSFET turns off. If you press the switch, turn off power and power up, there is still some charge on C11. To ensure the MOSFET is off at every power up the reset circuit should discharge C11. You could put a diode from C11 to the collector of U10.

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  • \$\begingroup\$ this not optocoupler this is button with led. @RobB. \$\endgroup\$
    – IHK
    Sep 6, 2019 at 13:36
  • \$\begingroup\$ this not optocoupler this is button with led. @RobB. Button on off latch circuit drives the mosfet. One transistor connected to "output not" to drive button led. Button led and our load at drain that is high power led works vice versa. Another transistor and its base connected to Vreset pin to provide reset so turn of all lamps while Vreset pin is energized and after the reset , button circuit must be in standby so button led must be on, power led must be off and button can be switch. \$\endgroup\$
    – IHK
    Sep 6, 2019 at 13:47
  • \$\begingroup\$ Rob i ll try diode option. Btw there is a strange stuation that when i disconnect the energy from source C11 discharges so slow. Cause of this if mosfet was on State when i disconnect the energy. Mosfet starts as turning on when i energized the circuit again. But if i give the energy to the Vreset pin. U10 collector feeds the Vdd of IC pulls ground so being reset. After that i disconnect the eneryg from Vreset Latch circuit starts as initial low that should be. Why :S I reduced the capacitance at C11 to 22p and resistor to 1K2 but there is no impact at discharge rate. \$\endgroup\$
    – IHK
    Sep 6, 2019 at 14:57
  • \$\begingroup\$ It is because charge remains on C11 and it discharges slowly through R24, a 4.7Meg ohm resistor. U10 does not completely reset the circuit because it does not discharge C11 which is why I recommend a diode from C11 to U10. \$\endgroup\$
    – Rob B.
    Sep 6, 2019 at 15:04
  • \$\begingroup\$ A HEF4093B is a quad NAND gate like the 4011 but it has schmitt trigger inputs. That will prevent oscillation at U2a from a slowly varying input. It is pin for pin compatible so you can swap them if desired. \$\endgroup\$
    – Rob B.
    Sep 6, 2019 at 15:29
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this is not an answer

redraw the schematic so that it is not so cluttered and your answer may become apparent to you

is something like this clearer to you?

enter image description here

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  • \$\begingroup\$ Nice. Thank you. This is better than mine. @jsotola \$\endgroup\$
    – IHK
    Sep 6, 2019 at 20:09

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