Please see the two diagrams below.

In the first diagram, each state (T1, T2, ...) seems to begin with the clock low. In the second diagram - with the clock high.

If we look at the DR/R' signal - in the first diagram it appears to be set low half a cycle before T1 begins. In the second diagram - it happens during T1.

It seems that if the state marks on the first diagram would be pulled half a cycle to the left, or the marks on the second diagram half a cycle to the right - the diagrams would become consistent.

I would like to know which diagram is correct.

First diagram: (taken from Microprocessors and Microcontrollers, by Krishna Kant) enter image description here

Second diagram: (taken from https://www.slideshare.net/tejabn91/8086-microprocessor-29199974) enter image description here

  • \$\begingroup\$ each state seems to begin with the clock low ... that is incorrect ... the state begins with a clock transition from high to low \$\endgroup\$ – jsotola Sep 7 '19 at 1:29
  • \$\begingroup\$ refer to the 8086 datasheet to determine the validity of the timing diagrams \$\endgroup\$ – jsotola Sep 7 '19 at 1:31
  • \$\begingroup\$ it is possible that the two timing diagrams are the same ... the bottom one is showing the minimal allowable values and appears to have the clock cycles mislabeled as you pointed out \$\endgroup\$ – jsotola Sep 7 '19 at 1:38
  • \$\begingroup\$ @jsotola ok, so in the first diagram a state begins with a clock transition from high to low, and in the bottom diagram - from low to high. Which one is correct? \$\endgroup\$ – obe Sep 7 '19 at 2:01
  • \$\begingroup\$ @jsotola so the bottom line is mislabeled and the top one is accurate? \$\endgroup\$ – obe Sep 7 '19 at 2:02

Intel put out the 8086 Family User's Manual quite some time ago. (1978 and 1979.) It includes AP-67 and a datasheet on the processor, too. You can get all of these from this bitsavers site link in a single PDF file.

I'm a little taken aback that you didn't bother looking for Intel documentation on their own processors in order to answer your own questions here. You must know that Intel produced adequate documentation for designers. Why present us, instead, with two inadequate snapshots from documents of unknown provenances without having taken a moment of your own time first to see if you could track down Intel's clear documentation in order to resolve your own questions?

(It would be one thing if you presented us with Intel docs and couldn't understand something in them. But it's another thing altogether to send us chasing after other documents. Intel's documentation is the place to go.)

Here's a diagram of minimum mode taken from AP-67 (which you can go get from the link above) found on page A-33, about halfway through the PDF.

enter image description here

Then take a look at page B-13 in the same document above:

enter image description here

There is no ambiguity here. Instead, clarity and quantitative details. And that's just two pages I picked out from this 750 page document. They also include words. Lots of them that also carefully walk you through the meaning of these diagrams and much more.

You should be able to answer your own questions from the above and from the document I've linked. It's pretty much all there.

There are only two other authors and/or publication sources I'd recommend to you. Anything written by Edward Solari (such as "AT Bus Design" or "ISA & EISA Theory and Operation") or anything written by MindShare, Inc. on these (or other) topics. (I've used both sources, at times.) Other than that? It's buyer-beware.

  • \$\begingroup\$ thank you for the detailed answer and the link. I did read Intel's data sheet a while back (though a shorter version; I haven't seen the 750-page document you suggested before...). I didn't remember that it had this info in this level of detail, and didn't have time to check it yet after Jsotola's comment. I apologize for wasting your and others' time on this... \$\endgroup\$ – obe Sep 7 '19 at 10:15
  • \$\begingroup\$ @obe My apologies for being stern. But imagine what it was like for those of us who had to find our own way back before the internet was available. We still had to find this information when it wasn't so easy. And we couldn't just ask others to do our own work. I want you to succeed well. But to do that you need to push yourself harder. Your situation is easier today and I worry a little about your approach to solving such questions. But I also believe that you will push harder and do very well in the future. You have my best wishes and hopes! \$\endgroup\$ – jonk Sep 7 '19 at 14:19
  • \$\begingroup\$ (1/2) Thanks @jonk. I understand where you're coming from. I don't really have to imagine what it was like before the internet, as I was already programming back then (albeit not professionally, and not hardware). I also don't like to see questions where the author seems to expect others to do their dirty work for them (mostly on stackoverflow, and usually with very "custom" problems about their own code). \$\endgroup\$ – obe Sep 7 '19 at 20:06
  • \$\begingroup\$ (2/2) I didn't realize I was doing that here, as I thought I was asking for a fact someone would probably have off the top of their head, or that I had some fundamental error in analyzing the timing diagrams and that someone experienced would easily point it out... \$\endgroup\$ – obe Sep 7 '19 at 20:06
  • \$\begingroup\$ @obe Suppose you heard an argument between a Malawian and a Turk about the nature of owls. The Malawian says that in Chichewa it's called a kuwukira which means "raid" and so it must be that owls are fierce animals. The Turk says that in Turkish it's called a Bulanık top which means "fuzzy ball" and therefore they must be cute and cuddly. Would you come here and ask us to decide who is right? Or would you just go observe owls and see for yourself? Asking us to arbitrate such arguments when the obvious is to just "go see for yourself" seemed kind of weird to me and it came off in my writing. \$\endgroup\$ – jonk Sep 8 '19 at 2:59

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