I am trying to connect an LVDS output to an 18-bit parallel input. Ser/des ICs like this all state on their datasheets (like on page 12 of the linked datasheet) that before they are able to function they "must initialize the links to and from [a matching ser/des]". Can this matching ser/des not exist and the data be generated from a different device entirely? The data is sent as 0b1 - 16 bits of data - 0b0.
If not, how would I go about deserializing the data? I thought about using an LVDS receiver such as this to recover the LVDS clock (which is also given as an LVDS output) and the data as single-ended signals and an 18-bit counter driving a multiplexer linked to 18 flip-flops. Would that work? I am a bit worried about timing, since the LVDS clock is 18x faster than the reference clock of the data source. Is that the "cleanest" way to go about it? I am trying not to use an FPGA and stick to discrete parts.
Thanks in advance!