So I am fairly new to using KiCad, and I have encountered a problem. I recently learned how to make hierarchical pins for bus assignments with the notation. NAME[start_index..end_index]

Everything works fine when I use this notation to connect hierarchical sheets. It even goes by position from the start index of the output to the end index, when the names change between the hierarchical sheets. (I looked at the generated netlist to confirm this)

When I bring the bus into its parent sheet and create bus entries and connections, it says the pins are not connected. Do I need to create another sub-sheet to complete, does it not let you use a bus in the parent sheet?

Note: Error was confirmed in ERC to be unconnected pins, and pins are the only ones in their net.

• If you pick up the IC and move it, do the nets follow? – Ron Beyer Sep 12 '19 at 21:56
• @RonBeyer KiCad never does that by default. What you are describing is drag mode, which can be used by hovering over the component and pressing g. – Caleb Reister Sep 12 '19 at 23:43
• It looks like you need to add square brackets to your net labels. PLC0 is not the same as PLC[0]. – Caleb Reister Sep 12 '19 at 23:48
• @Caleb Reister I haven't had to add brackets before for it to work as expected. Is there some reason I would need to add it for the parent sheet? – Dustin K Sep 13 '19 at 13:03
• Adding square brackets to label, did not work. – Dustin K Sep 13 '19 at 13:05

So it seems you need to add labels to the actual bus in the format name[start..end] when transferring busses between parents and sub-sheets, which is not very consistent with the way it works between sub-sheets.