I've been having trouble trying to understand the circuit mentioned in the title, which you can see in the picture below.

enter image description here

Note that I'll be using the ideal diode model in my explanations. In case this is the reason I end up confused please let me know.

Let's see this step by step. During the negative half-cycle of the input, diode D1 is on and the capacitor C1 is being charged up to Vin (the maximum value of the input). Capacitor C2 is also being charged since with the charging of C1 D2 turns on but let's ignore this for now.

In most videos and websites I came across, the next crucial point is the positive half-cycle of the input. What I understand without doubt is that D1 will now be off. So we are left with the following circuit :

enter image description here

Now the part I don't understand is this :

Because there is a voltage across capacitor C1 already equal to the peak input voltage, capacitor C2 charges to twice the peak voltage value of the input signal.

I cannot just accept this. I get that applying KVL with C1 charged will give me a C2 with a voltage of 2VIn. However, in order for C2 to charge, current is necessary. This means capacitor C1 will have to discharge in the process.

Also, KVL doesn't seem to hold if we apply it before C2 begins charging(it doesn't instantly charge to the 2Vin value) so this leads to even more confusion. Like, what happens if we connect a voltage source in series with a charged and a non-charged capacitor?

You can ignore this last question, I'm mostly concerned about how the voltage doubler works and I'm not happy with the explanations I find.


4 Answers 4


You are correct; C1 will discharge while it is charging C2, so Vout will be less than 2Vin after one cycle. However you may have missed this:-

Note that this double output voltage is not instantaneous but increases slowly on each input cycle, eventually settling to 2Vp.

But how much will C1 discharge, and what will the output voltage be after 1 cycle? It depends on the relative values of C1 and C2.

If both capacitors have the same value then C1 transfers half its charge to C2 and Vout becomes equal to Vin. On the next cycle C1 transfers 1/4 of its charge and Vout rises to Vin+Vin/2. This cycle continues with C1 discharging less and less and the output voltage getting ever closer to (but not quite reaching) 2Vin.

However if C1 is much is much larger than C2 it will lose less charge per cycle and the output voltage will rise faster. If C1 is 100 times larger than C2 then Vout will reach 99% of 2Vin in the first cycle.

  • \$\begingroup\$ My notion is that during the positive half wave of the first cycle, C1 transfers all its charge to C2... during the second cycle - half of its charge... during the third cycle - one quarter of its charge... and so on so forth... I have considered and visualized it in my Q&A mentioned below. \$\endgroup\$ Feb 26, 2020 at 13:31

The important part is the reference point for C1 is moving and the reference for C2 is fixed at the ground potential.

You're right that C1 charges during the negative half cycle through D1 up to V_in(peak to peak)/2. Then the positive half cycle shifts the potential across C1 upwards with respect to ground up so one side of C1 is at V_in(peak to peak)/2 and the other at Vin(peak to peak)/2 + V_C1. Presuming C2 is discharged at this point then D2 becomes forward biased, turns on and charge flows from C1 to C2 until such point (and possibly over many cycles) as V_in(peak to peak)/2 + C1 = C2 - V_D1_fw.

At this point you don't have enough voltage across D2 to forward bias it and can't transfer any more charge.


If you assume ideal diodes, D2 won't conduct during the first half of the negative half cycle because when D1 conducts, the voltage on D2's anode is zero. C1 charges to Vp.

Subsequently, D1 conducts only to top off C1 to Vp due to load current.

Once the voltage has reached minimum (negative maximum, or -Vp) and begins its return to zero, C1+ starts rising from ground according to the charge on it. When the input voltage reaches Vp, the anode of D2 is at 2Vp, to which it charges C2.

Again, with ideal components and no load, the output is at 2Vp from then on and no current flows. In reality, current is drawn at peaks of the input to cover load current and leakage.


Very interesting... It turns out there are others who are interested exactly in the same, which made me, two weeks ago, consider the general idea of this circuit in my answer to a similar question.

Fig. 7

Fig. 7. The capacitor C1 is charged in parallel to the source (a); then it producies voltage in the same direction in series (b)... the result is doubled voltage 2V (c)

But I realized the great challenge was to explain in an intuitive way what happens not only during the steady state but before that (immediately after the startup). For this purpose, yesterday I asked (and answered myself) two questions.

In the first Q&A I considered how the voltage doubler works immediately after the startup during the first three cycles - How does the voltage doubler work at the startup?

Voltage doubler at the end of the second cycle

Fig. 4. The capacitor C1 is fully charged by the voltage source V (a); then it is 50% discharged through the capacitor C2 (b)... which voltage becomes 1.5V

In the second Q&A, to make my explanation even clearer and more impactful, I supplemented it with the impressive hydraulic analogy of communicating vessels and asked it as a second question - How do we explain the voltage doubler operation by analogy?

Voltage doubler at the end of the second cycle - hydraulic

Fig. 4. 1/4 of the water is moved from the first to second vessel... and the water level of the second vessel becomes 3/2 of the initial level

I hope that my questions&answers will add further clarity to this discussion...


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