The design tradeoffs for SPI vs parallel bus ADCs are as follows.
NUMBER OF WIRES
A SPI bus uses only 4 wires.
1) few wires.
a) The ADC chip will probably have fewer pins, and will therefore probably be physically smaller.
b) Easier routing on PCB which means fewer layers or smaller size.
c) Both a and b may lead to lower size weight and cost.
2) Fewer solder joints. Less chance of failure.
3) Very few processor pins. Small cheap processors may be used.
A parallel bus for 16-bit data probably has at least 18 wires.
1) The large number of wires results in a more complex PCB layout.
a) The ADC chip will need to have lots of pins, and will therefore probably be physically larger.
b) The extra routing could mean a bigger board or more layers.
c) Both a and b may add to size weight and cost.
2) There are also more solder joints that could fail during manufacturing or use.
3) Parallel busses also use lots of IO on your processor. The High IO useage might mean that you have to pick a bigger more expensive processor.
A parallel bus can grab one sample in 1 or 2 clock cycles. If you need many millions of samples per second, this may be your only option.
A SPI bus will typically take at least 16 clock cycles + 1 cycle of chip select high time for 16-bit data.
1) Typical SPI busses can run in the low MHz range (10MHz to 50MHz is pretty common).
2) SPI based ADCs typically don't go beyond a few million samples per second.
The ADS8628 specifically
The ADS8618 has 8 channels that are multiplexed. The internal ADC can read one channel every 1us.
Figure 57 shows that register writes take 24 clock cycles (plus 1 cycle of CS high).
Page 11 shows that the SPI clock can be up to 20MHz when driven by the microcontroller/processor.
So in this mode a read/write would take about 1.25us.
This means that you can get samples at up to 100k samples per second on each channel using the regular SPI modes.
The MAX11047-MAX11059-1514141 specifically
These chips can simultaneously sample eight channels at 250Ksps. This means 2 million samples per second overall.
It looks like 1 bus cycle takes T9 + T11 =30ns + 10ns = 40ns. So you could read all 8 channels in 320ns.
Therefore its likely you could get the full 2 millons reads per second out of the device.
I am skeptical that any type of pressure or temperature transducer would need to be sampled that fast.
There should be very little temperature or pressure change in the course of 10us.
Therefore I would suggest using the SPI bus rather than a parallel bus.