I am trying to build a sound input for Raspberry Pi 3B using CS5340-CZZ as an ADC. I am basically using it according to the typical connection diagram in its datasheet, where I have a signal from a microphone amplified by a LM4808 on the input. I have connected a 8.192MHz clock on the MCLK pins and configured it to the Single-Speed Master Mode, but I am getting this on the SCLK (PCM clock) and LRCK (PCM frame) pins: I2S communication broken So as you can see the signal on the SCLK pin is irregular and the signal on the LRCK pin has a wrong frequency. I also tried to use the chip in the Slave Mode, in which I of course get the correct clock signals generated by the RPi, but then the chip seems to be sending no respose on the SDOUT pin. Could the problem be caused by the fact, that I have the chip soldered on a SMD to breadboard adapter and the rest of my circuit is on the breadboard? Or is the chip itself broken? Or is it caused by something else altogether?

  • \$\begingroup\$ What sampling rate you are trying to use? And are you able to control the direction of SCLK/BCK and LRCK/WS on RPi end? \$\endgroup\$ – Justme Sep 18 '19 at 5:05
  • \$\begingroup\$ This configuration with the 8.192 MHz MCLK should have 32 kHz sampling rate, but I have also tried higher sampling rates in the Slave Mode as mentioned above, however then I cannot detect any signal on the SDOUT pin. Yes, I am able to control the direction of these pins in my driver. \$\endgroup\$ – Martin Schmied Sep 18 '19 at 20:01
  • \$\begingroup\$ Well it can't be a slave unless the master clock comes from the RPi. It should work as clock master but then the RPi BCK and LRCK must be inputs. The logic analyzer capture shows there is something weird going on, an oscilloscope should provide a clear picture if both devices output BCK and LRCK. \$\endgroup\$ – Justme Sep 18 '19 at 20:39
  • \$\begingroup\$ Even if I disconnect the ADC in the Master Mode from the RPi, the generated clock signals appear the same on the ADC side and there is no clock signal on the RPi side. So the clock signals do not come from both devices. \$\endgroup\$ – Martin Schmied Sep 20 '19 at 18:25

I have now returned to this project of mine, I have finally realised my silly mistake. According to the typical connection diagram there should be a 5.1Ω resistor between VA and VD pins, but I accidentally originally put a 5.1kΩ resistor there. After replacing the resistor with the correct one the ADC works all right.


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