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I always thought that component orientation in EDA tools (IPC-7351) is separate from component orientation on tape (EIA-481).

This made total sense to me: first, PCB design defines rotation relative to standard orientation, so pick-and-place file specifies exactly how component is oriented relative to PCB. Second, the orientation of a component on a tape is specified by a manufacturer. The combination of the two gives exact rotation the pick-and-place machine should perform when placing a component.

... and then I stumbled upon a document that implies that library footprints should be oriented exactly as the components on a tape. Which, unfortunately, is often different for different manufacturers. Not only that, but the EIA-481 standard itself changed orientation between -C and -D revisions, prompting some manufacturers (e.g. IDT) to issue bulletins notifying customers that they will stick with older revisions of the standard for the time being.

Now, this does not make sense to me. It basically means that I should know in advance the position of the PCB relative to the tape. Which is far fetching, considering that automatic panelization often rotates PCB to fit more of them.

Finally, what blew my mind completely, is that various sources seem to disagree what quadrants really mean. The EIA defines them like this:

1 | 2
--+--
3 | 4
Some manufacturers, like Analog Devices, define them like this:
1 | 2
--+--
4 | 3
Not to mention that neither corresponds to 300 years old Cartesian system...

When I asked the manufacturing house for the clarification they replied with "use EIA-481 for zero component orientation, and use the IPC-7351C to design the size of the pads." With all the standard changes and discrepancies this basically tells me nothing.

So, should I really redefine packages in KiCad according to each manufacturer, losing an ability to quickly change suppliers of the same part? Or should I just go ahead with built-in packages and hope the house will figure it out somehow?

UPDATE:

Just received the boards and wanted to give a quick update. It looks like the comments by The Photon and others were right on the mark - the shop did not have any problems with orientations and placed all components exactly right.

I did not adjust anything to manufacturer-specific tape orientation, simply used footprints from KiCad libraries where it was appropriate. For my own footprints I followed IPC-7351C orientation guidelines, pretty much leaving the shop to deal with EIA-481 discrepancies. Of course, it could be I got lucky and the suppliers I've used in BOM simply happen to use compatible orientations.

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    \$\begingroup\$ I have never had an assembly shop complain about this, and I have never worried about how I define 0 orientation. Possibly they are adding some amount to the NRE for their tech to sanitize my pick & place files by correcting the orientations. But they've never even mentioned to me that it is an issue or an added cost. \$\endgroup\$
    – The Photon
    Sep 20, 2019 at 17:07
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    \$\begingroup\$ In my experience, as long as you have a visible pin 1 or polarity indicator on the board for every part that needs it, the assembly vendors can deal with whatever orientation data yo ugive them.. \$\endgroup\$
    – The Photon
    Sep 20, 2019 at 17:08
  • \$\begingroup\$ @ThePhoton I wonder if you're just lucky or it is fairly common for assembly shops to do this kind of cleanup... Hopefully the latter, considering how many hobbyists they have to deal with \$\endgroup\$
    – Maple
    Sep 20, 2019 at 17:11
  • \$\begingroup\$ The shop normally takes care of this, and they are usually the ones who find the component orientation relative to the Pin1 mark on the board. \$\endgroup\$
    – Voltage Spike
    Sep 20, 2019 at 17:14
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    \$\begingroup\$ @Maple, I've used at least half a dozen assembly shops over the years and never had a problem. Also placing parts at 45 degrees routinely (including big BGAs) with no trouble. (Note: these are not ultra-low-cost hobbyist shops, so that could make a difference) \$\endgroup\$
    – The Photon
    Sep 20, 2019 at 17:55

2 Answers 2

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You all might be interested in how a feeder is configured in a Pick-and-Place machine. Below is a screenshot for a Samsung CP-45, which is a respectable PnP of the early 2000's, so somewhat older, but what it has to deal with is representative.

Configuration panel for feeders in Samsung CP-45 Mark 3 software.

Each row in the table is a feeder position, and you can see it lists what Part is to be fed in that position, and the exact X and Y coordinates at which the nozzle should pick up the part. Also a vertical position (Z). But most salient for the current thread, there's a "PartR" column. This tells the machine how much it must rotate the component to get it into "The" standard zero orientation, (as portrayed on a config screen for the component or package).

This PartR configuration item allows you to accept parts on tape reels, or in "sticks" (tubes), or on trays. Each of these may supply the part in a different orientation, and it may vary from one tape to another. So it's up to the PnP operator to fill in PartR to bridge the gap between supplied orientation and the PnP's standard zero orientation.

So at most, the role of the PCB designer should be to supply placement data to the PnP that states the orientation of the part relative to the PnP's idea of "The" standard zero orientation. This of course requires knowing what are those PnP standard zero orientations.

In principle, the PnP manual, or the board house, should be able to tell you what "standard" the PnP follows for its zero orientations, or what those orientations are for specific packages you're using. (Conceivably, an alternative workflow would be for the PCB designer to provide to the board house a reference declaring the zero orientations assumed for each component or package. In practice, they may just eyeball the actual board.)

It ought not be necessary to actually change your PCB design library footprints to match the PnP's zero orientations. (... which could change if you moved to a different PnP). Instead, you can post-process the PCB software's output PnP placement/orientation data, to add or subtract rotations so it's relative to the PnP's zero orientations.

In practice, some of these "oughts" are easier said than done, possibly motivating changes in the upstream PCB library to compensate for missing downstream steps, like hassle of post-processing the placement data, or PnP operator who doesn't understand how to configure feeders.

But assuming an up-to-speed board house, the PnP software (and operators) already have to take care of accommodating components delivered in different formats and at different rotations. Not to mention the PnP has to do the right thing if the feeder is mounted on the feeder slots on the back of the machine, where it's rotated 180 degrees.

So at the PCB design stage you don't have to deal with that level of detail. But ideally you would institute some mechanism whereby the zero reference rotation used for each component in the PCB design is coordinated with the zero reference rotation used by the PnP.

Hopefully that sheds some light on the matter!

(By the way, in the screenshot, there's also an "R" column. The manual describes it as something to do with rotation, but the translation from Korean is incoherent. Regardless, it doesn't appear to have any effect that we could determine through experimentation.)

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I agree with you: standards and practice are not inline with each other. I have done quite some investigation on this myself.

In summary:

  • The component orientation in the design file should be the same as the orientation on the tape.
  • Even if the orientation in the design file is wrong, I did not meet a single manufacturer that complains about this. They always ask the customer to validate the orientations.

Yesterday, I verified an online tool of a PCBA manufacturer that allows you to check and correct the component orientations online. There were quite a few orientations that were incorrect while the footprints definitions have the correct designed orientation according to IPC-7351.

Despite that, I do check the orientations of components. Generally the orientation on tape is mentionned in the datasheet, sometimes you need to go and find it in the manufacturer's "central" documentation where they list all specifications of their packages and orientation on tape.

You do not need to know the position of your PCB relative to the tape. The orientation is defined by your design files. The manufacturer copes with the difference of orientation between your design file and the actual panel orientation.

Even if various sources disagree with regards to the orientation of the quadrants, what is important is that quadrant 1 is the upper left.

The manufacturing houses that I consulted with regards to the design rules said that they can pretty much do anything - but they do not tell you at which cost!

If you can, you should define your footprints according to the actual orientation on tape. In practice you do not really have to care too much, the manufacturing houses are used to the fact that there are many discrepancies. The built-in footprints in KiCAD generally need some rework anyway if you want to have a better fabrication layer for instance. I prefer putting in some time up-front, which avoids most of the placement errors to finally correct only a few.

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  • \$\begingroup\$ It's a minefield, I once did a repeat run of some PCB's for a project where we had made maybe 500PCA's already, for some unknown reason part of the silkscreen around all the diodes was missing, my diode footprint has a thick line all around the cathode and a 3 thin lines at the anode, for some reason the thick lines didn't print, so the diode just had 3 thin lines around the anode. The operator on the machine noticed the lines and thought they were the cathode, so spun all those diodes around, We didn't figure it out till we had pushed 2 panels through the oven and tested them. , \$\endgroup\$
    – BobT
    Aug 9, 2020 at 11:18

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