enter image description hereCircuit used

This circuit works quite well with low signal levels, but when the RMS ac signal is appr. 0.8 to 1.0 V (measured on pin #1 of the opamp), the negative half wave of sinusoidal signal is distorted so much that you can see it clearly on the oscilloscope. I am not asking, how to correct this circuit, but like to know the reason for this behavior. This is an existing circuit, and I know how it must be changed.

Added: Image from oscilloscope shows that the "negative" part of the signal is like wider quite much and has clearly different form. So it is not cutting, and if I add voice level to the microphone, cutting starts at the positive half wave first.

  • 1
    \$\begingroup\$ a picture or sketch of the distorted waveform would be helpful \$\endgroup\$ – joribama Sep 24 '19 at 21:22

Is the distortion beginning at 0.8 to 1VRMS at the input or output?

It's hard to say definitively without some bench time, but I suspect your biasing scheme. You have an 8.2K resistor (R2) which doubles as bias and feedback. The gain is apparently set by this resistor and the current output of the ECM. This is not a particularly accurate way to set gain, and it's a bit unconventional to bias an ECM with a variable voltage. It may be when the mic output drives positive, it's starved for bias as the output of the buffer goes negative.

Usually an ECM is biased to a constant DC voltage (many CODECs and other audio components contain a special LDO just to generate a clean, quiet mic bias signal). Then it is buffered, usually, with the buffer having an input impedance somewhat greater than the ECM output. (All ECMs I've seen actually include a JFET buffer stage internally, since the voltage and current generated by the electret itself will hardly drive a short length of wire.) wire

  • \$\begingroup\$ It's not really biased with a variable voltage, the feedback loop will keep the bias exactly at the voltage at the negative terminal, at least within the BW of the op-amp. And the gain is accurate, but it's technically a transimpedance. The output voltage is the mic current times the 8.2K. \$\endgroup\$ – John D Sep 24 '19 at 21:16
  • \$\begingroup\$ True, but a typical bias scheme isn't voltage controlled at the mic terminal, it's more current controlled...the bias current doesn't vary significantly based on the instantaneous output. In this case, we don't have that reliable source of bias current in all cases. \$\endgroup\$ – Cristobol Polychronopolis Sep 25 '19 at 12:49
  • \$\begingroup\$ Agreed, this is not the typical bias scheme which usually uses a resistor in series for bias, but I don't see that as the issue in this case. \$\endgroup\$ – John D Sep 25 '19 at 15:27
  • \$\begingroup\$ This was a good hint. The microphone capsule (with JFET inside) can get bias current only through the R2, as I understand. Actually the voltage at the pin #1 of the op amp has both dc and ac (measured dc is 6.2 V). So the bias current for the MIC cannot be considered to be constant, and this is the behavior, when using inverting pin as a signal input pin. Actually the positive half wave is distorted as much but opposite direction. Now I have an understandable explanation, and can give reasonable answer on why these circuits must be fixed. Thanks! \$\endgroup\$ – UIR Sep 25 '19 at 19:53

Your virtual ground is formed by R3 and R8, and puts the bias point around 4.9V.

At 25C, with a +/-15V supply, this amplifier is only guaranteed to swing within 3V of the rail.

So 4.9-3V is 1.9V. It's probable that the amplifier will distort before that point, and with your supply rails at -5V and +10V (due to your bias point being ~5V) it could make the available headroom worse, though there's no data on output swing under those conditions.


Your Answer

By clicking “Post Your Answer”, you agree to our terms of service, privacy policy and cookie policy

Not the answer you're looking for? Browse other questions tagged or ask your own question.