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schematic

simulate this circuit – Schematic created using CircuitLab

Will this work as a four-bit shift register? (And by extension a shift register of any size?) Each vertical PMOS / NMOS transistor pair acts as a multiplexer, and the PMOS transistor to its left amplifies the voltage back up to close to V_high. I'd be interested in hearing people's feedback on this. Right now I have only three transistors (and a resistor) per bit. Can I really get it that small a ratio, or are there reasons why I need more transistors per bit?

It's probably worth noting that I don't have master/slave here, so I can only assert (Shift) long enough to move one bit toward the right and no more.

Furthermore, I'm not trying to say that I need a resistor with 100 ohms. That appeared to be the only resistor I could use to make this schematic! What I want is a resistor that has significantly less resistance than the PMOS it's next to when it's at high impedance, but enough resistance to prevent a short circuit from V_high to ground when that transistor is conducting.

Okay, now I've changed each of the BJT's to MOSFET's, and reduced the resistance of each resistor from 100 ohms to 10 ohms. I'm still going on the assumption that (shift) will only be asserted long enough for the gate delays of M4 and M5, and then of M6, so the value of (dataIn) will only make it to M6's output, and won't move to M8 until the next time (shift) is asserted. Is this enough to get this circuit behaving like a four-bit shift register?

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    \$\begingroup\$ You're talking about MOSFETs yet you've drawn BJTs.... \$\endgroup\$
    – Hearth
    Commented Sep 25, 2019 at 21:05
  • \$\begingroup\$ Have you tried simulating this? LTSpice is free. \$\endgroup\$
    – Aaron
    Commented Sep 25, 2019 at 21:50
  • \$\begingroup\$ You can edit your schematic any time you edit your question. Double click the resistor and it will let you change the value, or even blank out the value if you don't want to specify a value. \$\endgroup\$
    – The Photon
    Commented Sep 26, 2019 at 0:52
  • \$\begingroup\$ @Aaron: He's already entered the schematic into a working simulator. \$\endgroup\$
    – Dave Tweed
    Commented Sep 26, 2019 at 2:13
  • \$\begingroup\$ Actually, I haven't entered the schematic into a simulator. I'm taking a look at LTSpice, and will probably download it this Wednesday (the next time I have access to a computer). \$\endgroup\$
    – KevinSim
    Commented Sep 28, 2019 at 21:43

1 Answer 1

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There are three major problems with your circuit.

  • The logic elements have no voltage gain, so the signals get weaker and weaker the farther they propagate.

  • There's no way any of your stage-to-stage pass transistors (Q5, Q7, Q11 and Q15) could possibly pull the input of the next stage low.1

  • Even if those problems were addressed, you have only a single-phase clock. When "shift" is high, all of the multiplexers are in series and the data just propagates directly from the input all the way to the last output.


1 Actually, that isn't strictly true. With some appropriate circuit changes, you might get those transistors to work in "reverse active" mode, in which the roles of collector and emitter are reversed.

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  • \$\begingroup\$ Why don't each of Q4, Q9, Q12, and Q14 give a voltage gain to its respedrive bit? That's the whole reason I added those three transistors. A logical one output of each multiplexer is indeed going to be weaker than a logical one input, but it should be enough to turn off the corresponding one of those four transistors, shouldn't it? And if that transistor is off, shouldn't the voltage before it go high, almost up to (V_high)? Won't that be enough to keep my signal from deteriorating? \$\endgroup\$
    – KevinSim
    Commented Sep 28, 2019 at 21:18
  • \$\begingroup\$ As for the second matter, I'm aware that if (shift) stays high long enough the data will indeed just propagate "directly from the input all the way to the last output." But that's going to take time. Is it impossible to take (shift) high and then take it (low) quick enough that the data from the input only moves one bit's worth? \$\endgroup\$
    – KevinSim
    Commented Sep 28, 2019 at 21:26
  • \$\begingroup\$ No, those transistors in particular are wired as emitter-followers, which have slightly less than unity voltage gain. As I said to @Aaron, you've already entered your circuit into CircuitLab (see that "simulate this circuit" link below it?) -- it would be easy enough to run the simulation to see what I'm talking about. \$\endgroup\$
    – Dave Tweed
    Commented Sep 28, 2019 at 21:55
  • \$\begingroup\$ @KevinSim Propagation times through the transistors vary with temperature and process parameter spread. So you’d need to be matching transistors for propagation time, and the clock pulse would need to be of high amplitude and very short. It’s not a trivial task to push nanosecond pulses through such a circuit without reflections messing things up. And you’ll need a rather spiffy measurement setup to measure anything, eg. low capacitance get probes not to introduce parasitic capacitance into the circuit. Your general idea is used in practice in lateral sampling switch circuits. \$\endgroup\$ Commented Feb 22, 2022 at 20:47

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