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I've already known that I/O buffer transfers data on both the rising and falling edges of the clock signal.

But it really confused me why I/O bus frequency is half of effective frequency.

For example, in DDR2-800.

Basic memory clock is 200 MHz.

Use 4n-prefetch technology.

So the effective frequency equals 200MHz*4 = 800MHz from the processor (CPU)'s perspective.

Here's the point.

Since I/O buffer transfers data 800M times per second on both rising and falling edge, we can infer that, each time when it works, I/O buffer transfers 400M times on one single edge.

Thus the work frequency = 400 M times / 0.5 second = 800 MHz.

By this equation, I/O bus frequency should be equal to effective frequency, both 800 MHz.

But on Wiki page DDR its said to be 400 MHz.

DDR Table

How to explain this?

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  • 2
    \$\begingroup\$ I think you mean "effective frequency" rather than "efficient frequency." \$\endgroup\$ – JRE Sep 26 at 10:58
  • \$\begingroup\$ Why times 4? If state changes occur on both rising and falling edge you have 2 state changes per period. So 200 MHz * 2 = 400 MHz \$\endgroup\$ – Swedgin Sep 26 at 10:59
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The 4N pre-fetch architecture means that 4 data words are pre-fecthed prior to the read burst from 4 different adjacent columns. This diagram assumes the row address hs already been latched by an activate command.

Here is the read timing:

DDR2 Read burst

In the actual data transfer burst, you can see DO n in the first transfer and from the datasheet

DO n = data-out from column n. where n is between 0 and 3 (the data is not necessarily transferred in the order 0, 1, 2, 3).

We ae using both edges of the clock and therefore 400 MT/s (MegaTransfers per second) equates to a 200MHz clock.

Therefore the 4N relates to the number of transfers done during a burst, not the actual burst rate.

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  • \$\begingroup\$ Thank you, that's helpful.It makes sense in DDR2,where basic memory clock is 200MHz and I/O bus clock is 400MHz. While in DDR3, basic memory clock can still be 200MHz, therefore we still do 400Meg transfers per second, but I/O bus clock goes up to 800MHz. What causes the difference? \$\endgroup\$ – miniquuu Sep 28 at 3:50

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