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schematic

simulate this circuit – Schematic created using CircuitLab

I feel as if I already know the answer to this, but I want a sanity check (I'm working in 0V low, 5V high logic level):

In lieu of a multiplexer (because I had none), I have 32 transistors. The collectors are paired up and hooked to 16 inputs. The emitters are 32 discrete outputs. The bases are hooked up 16 each to the Q and Q' of a toggle.

The voltage of the base signals end up being 1V when "high," and when I would expect an output to be fully high, it is also about 1V.

I tried adding two extra transistors with the bases of each connected to Q and Q', and collectors tied to a small current limiting resistor at the voltage source. This helped a little, but only got me to about 2.5V and these two transistors got very, very hot.

Am I foolish, and this behavior from my hillbilly mux expected? Or should it work, and I likely have something wrong in my soldering?

EDIT: I forgot to mention, the transistors are 2N2222.

EDIT2: Added diagram of 4 resistors as example.

EDIT3: The outputs will be going into the data in / address inputs for a RAM chip, so they do not need to drive very much current. The Q and Q' are coming from a 74LS107 JK flip-flop with J and K tied together so that it acts as a toggle. As stated above, I tried using the Q and Q' signals to switch some other transistors tied almost directly (5V -> 150ohm -> collectors) to the power supply, but that caused them to overheat.

EDIT4: The RAM chips are two 6116P-3. Outputs O1a, O2a, etc are going to one chip, outputs O1b, O2b, etc are going to a second. This is done so that I have two buffers that the inputs can write to. The inputs which will target the I/O lines on the RAM come from a 74HC595 shift register. The inputs which target the address lines come from a CD4040 binary counter.

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  • \$\begingroup\$ I just realized this is more of a reverse mux. There's 1 input and 2 outputs that are selected, rather than vice versa. This is intentional for my purposes, though. \$\endgroup\$ – Tim Morris Sep 27 '19 at 3:04
  • \$\begingroup\$ @TimMorris That's called a demultiplexer, or demux. \$\endgroup\$ – Hearth Sep 27 '19 at 3:10
  • \$\begingroup\$ Write a lot more about what is attached to the emitters and bases. From your writing, may I assume that your inputs are either 0 V or 5V? \$\endgroup\$ – jonk Sep 27 '19 at 3:32
  • \$\begingroup\$ @jonk That is correct. \$\endgroup\$ – Tim Morris Sep 27 '19 at 3:35
  • \$\begingroup\$ What is attached to the emitters? And how in the world can you measure 1 V at the base if you are supplying 5 V at the base? There is much more to this story, I fear. You must not have a low impedance driver at the base, for one thing. We need lots more detail. \$\endgroup\$ – jonk Sep 27 '19 at 3:38
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The functionality you're describing is exactly the same as what was discussed in PISO buffer for the MachXO2 a short while ago. Here's the first diagram from that answer:

schematic

Note that there's no switching at all required for the "write data" bus — you simply connect it directly to both RAM chips.

But you do need multiplexers (NOT demuxes!) for the address pins and for the "read data" bus, as well as the write enable pins.


In any case, trying to use BJTs to implement "pass transistor logic" is pretty much doomed to failure. The offsets introduced by all of those PN junctions pretty much destroy any concept of "logic high" and "logic low", especially if you're trying to interface to chips designed to TTL standards. Just get a bunch of quad 2:1 mux chips in the proper logic family already.

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  • \$\begingroup\$ The 6116P-3 uses the same pins for data in and data out, is my problem. \$\endgroup\$ – Tim Morris Sep 27 '19 at 21:27
  • \$\begingroup\$ In that case, you need proper tristate buffers, since you need to drive each pin both high and low. \$\endgroup\$ – Dave Tweed Sep 27 '19 at 21:33
  • \$\begingroup\$ That's what I was afraid of. Oh well. Thanks for the input. \$\endgroup\$ – Tim Morris Sep 27 '19 at 21:34
  • \$\begingroup\$ @TimMorris The 6116 was very popular, long time ago, and in the wide 26pin (.6") DIP. It's now available in narrow 24pin. But I believe you'll find tristate buffers already inside it. \$\endgroup\$ – jonk Sep 28 '19 at 7:42
  • \$\begingroup\$ @jonk: The point is that you also need tristate buffers between the "write data" bus and each of the RAM chips. \$\endgroup\$ – Dave Tweed Sep 28 '19 at 11:07
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The problem with your circuit is that a bipolar transistor works in both directions. When the polarity between Collector and Emitter is reversed they swap functions, so the D or A input gets 'shorted' to the 74LS107 Q or Q' output via the Collector-Base junction (which is now acting as a Base-Emitter junction).

That's the bad news. The good news is that due to this symmetry the transistor can pull both up and down, so you don't need a pull-down resistor. To make the transistor work as a bidirectional switch without drawing excessive Base current you just need to add a resistor in series with the Base. The resistance needs to be high enough to keep current below the LSTTL output source limit of 400uA, but low enough to get a satisfactory transition time.

A resistor value of 15k gives reasonable transition times and would draw about 180uA per transistor. However that only gives a fanout of 2, while you need 16. 400uA/16 = 25uA per transistor, so the Base resistors would need to be >= ~150k each. Unfortunately that low Base current multiplied by the transistor's low reverse current gain results in a rather slow fall time (~3us with 20pF load).

However a standard TTL gate output can pull low by ~16mA, so you could use a pull-up resistor to source more current. A 470Ω pull-up would draw ~10mA when pulled down, and source ~3mA at 3.5V when the TTL output is high. This should be sufficient to drive 16 transistors with 15k Base resistors.

The circuit would look like this (one transistor shown):-

schematic

simulate this circuit – Schematic created using CircuitLab

Note that I have swapped the Collector and Emitter, so the transistor is working in reverse for Logic '1' (high) and normal direction for logic '0' (low). The HM6116 RAM has TTL compatible inputs which need to be below 0.8V for a '0' and above 2.4V for a '1'. Since the transistor has much higher current gain in the normal direction, this connection allows it to pass more current when the input is '0', improving the more critical falling transition time.

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