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This is not a question about tuning PID loops for stability. I am assuming the output looks stable.

The question is: Do PID loops ever achieve absolute stability, or is there inevitably a periodic oscillation, no matter how small?

It's more a question about the fundamental nature of the equations rather than implementation (which can be analog down to the noise limit)

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    \$\begingroup\$ If this is a digital implementation, "limit cycle oscillation" may be a useful search term \$\endgroup\$ – Brian Drummond Sep 30 at 10:11
  • \$\begingroup\$ You’ll always get an exponentially decreasing oscillating term in an underdamped linear systems. What do you mean by oscillation and what do you mean by stable? These things have precise technical definitions, which, from reading your question, I think you are not using accurately. \$\endgroup\$ – user110971 Sep 30 at 10:29
  • \$\begingroup\$ @BrianDrummond It's more a question about the fundamental nature of the equations (question now modified to state that) \$\endgroup\$ – Dirk Bruere Sep 30 at 10:30
  • \$\begingroup\$ It will only overshoot and have a decaying oscillation if the damping ratio is less than 1. \$\endgroup\$ – Andy aka Sep 30 at 12:07
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    \$\begingroup\$ Any tiny energy event will re-trigger ringing, in an under--damped system. Thus VDD trash entering the loops thru finite PSRR may be a problem. \$\endgroup\$ – analogsystemsrf Sep 30 at 16:08
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There's no inherent oscillation in the output. A perfect PID controller controlling an ideal 2nd order system has a closed-loop transfer function that either moves asymptotically to the setpoint (damping factor greater than 1) or oscillates about the setpoint with the oscillations decreasing to an arbitrarily low value over time (damping factor less than one). Typical tuning is such that the oscillations decrease by a factor of 4 or more every cycle so they would quickly fall below any realistic noise level (\$0.25^{20} \approx 10^{-12}\$).

Real PID controllers can have limit cycles (for example if there is some stiction in a valve actuator) or they can be time-proportioning types that have an output PWM that shows up in the output. Probably other stuff too. Anything you look at with a 24-bit or better ADC probably has some pattern you can find, even if it originates in the ADC itself (eg. idle tones).

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For any given loop, it will have a frequency response. If the frequency response is 'peaky', then we'll often say the loop has marginal stability. This will amplify the input noise, and as the gain is high over a small range of frequencies, it will tend to filter it and make the output look oscillatory.

However, a properly designed loop will have minimal or no peaking, and will minimise this effect.

If the frequency response goes to infinity at some frequency, then we'd say it was unstable, and it would oscillate at that frequency, but with very large amplitude, so that wouldn't account for small oscillations.

If it's a digital implementation, then it will have a finite resolution in its internal representation of the parameters. As it's a feedback system, there is the opportunity for limit cycles to occur. If the word length is short enough, these limit cycles may be visible.

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I'll keep this answer simple. PID works best when the delay is short and predicable. This means that the time between input reading and computation time to output is invariable..

The next thing to do is to shorten delays and the variances in delays to ADC through processing through DAC output. Then next important aspect is to keep that delay as consistant as possible.

What's important is short delay and consistent delay.

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