But i want to understand from circuit perspective what i could do here
to minimize various errors and get the best circuit performance ?
The first thing to take note of is the input common-mode voltage range and, for this device it is limited to 13 volts on a 15 volt rail. Typically it might be as high as 13.8 volts but, given that the +in node will see 13.63 volts, you might get into trouble if you built a few.
The input offset voltage can be as high as 3.5 mV (7 mV over the full temperature range) and given that your circuit implies a current of 1 amp flowing through a 1 milli ohm resistor, you are going to get massive errors.
Input bias and offset currents won't produce a significant error as far as I can tell.
Common mode errors might also be significant if the V1 voltage jumped around a bit. CMRR is guaranteed to be 66 dB and this translates to a shift in input offset of 0.5 mV for a change in V1 of 1 volt. Might be significant!
The accuracy of the resistors is fundamental to best performance for this type of circuit and, if you do the math (i.e. a tolerance analysis) you'll quickly see that performance/repeatability is poor with 1% resistors.
I recommend you simulate this last point by changing the resistors, 1 by 1, to create a tolerance error.