Are there any free simulators available for a hardware design coded in SystemVerilog? In particular, I need SystemVerilog's dynamic arrays.
All the versions of Modelsim: Student Edition (SE), the FPGA simulation tools released with Intel Quartus (IE), MicroSemi Libero (ME), and Xilinx Vivado (XE), support all SystemVerilog constructs with the exception of randomize, covergroup, and assertions.
Try the free
Modelsim-Intel FPGA edition:
Works great and is closer from what you can find in professional environments.
Standard and version
16.1 if you don't want to download 6GB. Available for Linux and Windows.
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