Vnoo3 is the drive voltage, and Ig is the gate current. What I am wondering is:

1) How to calculate the peak Ig on the rising edge of the pulsed gate voltage? For instance, using the spice image below. It's a 400kHz "square" wave with a 45% duty cycle.

2) How to use the datasheet to find out what drive current is necessary to be able to drive the MOSFET at a certain frequency? Please provide a real example. I understand the gate-charge vs vgs curve, and how the miller capacitance effects the charging of the gate capacitance, but I am not able to connect the dots to do what my question is asking.

Please let me know if you need more information.


LTspice Sim

  • \$\begingroup\$ You need to define the slew-rate of the drain voltage. Then you can use I = C * dV/dT to compute the current demanded by the Cmiller. Then you must define the behavior of the Gate voltage, in slew-rate form, and you can compute that Cgate_source current. \$\endgroup\$ – analogsystemsrf Oct 8 at 1:57
  • \$\begingroup\$ Hello, Sorry for the late reply. Would you be able to do a rough estimate using points on my image, and marking the image where you estimated the point to be? Isn't Cmiller a non-linear capacitance so it is changing as Vds collapses? \$\endgroup\$ – user10231745 Oct 21 at 17:02

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