decoupling capacitor's inrush current effect on usb filtering

Question

I am confused about 2 different articles about decoupling capacitors and usb filtering.

First one: https://www.autodesk.com/products/eagle/blog/what-are-decoupling-capacitors/

this says i should use 2 different decoupling capacitors for each ic. One for high frequency(0.1 uf) and one for low frequency(10uF) noise. This makes great sense.

The second one is about usb voltage filtering. http://andybrown.me.uk/2015/07/24/usb-filtering/

This article says "It’s a little known fact that the USB 2.0 standard mandates a maximum of 10µF in parallel with VUSB to limit the inrush current"

So the problem is, i have 3 ics. with each has 10 uF in parallel i get way more impedance between 5V and gnd since they're all parallel between 5v-gnd.

Is using only 1 piece of 10uF at the end of filter instead of placing 3 pieces 10uF for each ic enough?

Edit: One ic is pca9555 nxp.com/docs/en/data-sheet/PCA9555.pdf? (could not seea cap value on this) other is mcp2221A ww1.microchip.com/downloads/en/DeviceDoc/20005565B.pdf

Answer 1

Can you reference(or link) the component datasheets to see what the manufacturer recommends for decoupling capacitors? It is likely that the components dont really need their own 10uF cap. Often times just a 0.1uF or a 0.1uf + 1-4.7uF will be recommended.

I would expect that an individual 0.1uF plus a shared 4.7 or 10uF would work just fine.

Answer 2

Do read my answer in Output capacitors placement in PCB

Is using only 1 piece of 10uF at the end of filter instead of placing 3 pieces 10uF for each ic enough?

Yes, 1 capacitor of 10uF will serve all other IC's.
I wonder if you really need 10uF and think you could use 2.2uF or 4.7uF instead. But that depends on cable length and whether the input current of those IC's is high frequent etc.

EDIT based on new comments
You need this 10uF capacitor to filter fluctuations of the voltage of the USB port as well as act as local buffer for the electronics 'behind' it. When there is a sudden increase in demanded current, this current will be initially drawn from this buffer (because the (USB and other) wiring has inductance which makes it too slow to respond to this sudden increase).
The buffer capacitor will make sure the voltage doesn't drop too much.

The microprocessor and the PCA9555 itself hardly draw current.
The total current sourced by all I/Os of the PCA9555 must be limited to 160 mA.
So, if you decide to turn on all ports at once drawing in total 160mA, you may need 4.7uF to prevent the 5V rails drops too much.
But I expect the capacitor value can be reduced.

Answer 3

These two questions are nearly unrelated to each other. In normal situation the internal ICs usually are powered with 3.3V, so typically a 5V-to-3.3V regulator is required. And therefore the bypass caps are de-coupled from the 5-V input.

Now, each IC needs de-coupling caps, and their values are usually specified in respective datasheets, with all this spectrum-spreading set of values, 100pF + 0.1uf + whatever. This is a separate issue for IC operating stability and suppression of internally-produced consumption spikes of current.

The USB "stability", however, requires that every USB device upstream-facing port (UFP) to have no more than 10 uF. More specifically, it is not the 10uF limit, but rather a limit for total charge (50 u-Coulombs) that flow into the device's port at plug-in event. It should be less than 50 uC integrated over 100 ms. It is required to avoid voltage "droops" and "drops" when the devices are hot-plugged into USB host, for not to interrupt functionality of already connected and working devices. Therefore a USB-compliant device (or UFP of a hub) MUST NOT have more than 10uF (5V x 10uF) at the input DIRECTLY. (actually, this cap should be no less than 1.0uF for different reasons).

So there is a design dilemma if the set of ICs inside the USB device needs more than 10 uF each, which is however a rare case. This problem must be solved by careful engineering of VBUS power path input, which might include ramp limiting and time delays in consumption.