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Just wanted to clarify my understanding before I design my circuit.

This is based on my previous question

I have an 3.3V LDO Regulator.

Vin = Regulated 5V

Vout = 3.3V

Load Current = 100mA.

At the output of the LDO, I have a PI Filter Capacitor.

I am having a reverse current of 16uA flowing into the LDO.

Can someone help me to understand how does a reverse current builds up my output voltage from 3.3V to 4.2V.

I am planning to add a Zener rated 3.6V after my Pi filter. I just want to understand how does a small reverse current of 16uA builds up my output voltage from 3.3V to 4.2V?

Does this reverse current hit the inductor of the pi filter and get accumulated near the output side of the inductor to finally bring the output voltage from 3.3V to 4.2V? Or what's happening?

Thanks

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    \$\begingroup\$ Hi, This seems to be your second question about having 4.2V on the output of a 3.3V LDO. It was already explained in the accepted answer on that question, that you should change your design & not use pull-up resistors to 5V on your 3.3V MCU GPIO pins. FYI it won't help you to get the best answers, by asking separate questions on the same topic, without mentioning (and linking) previous related question(s) and explaining what changed since then. That's because each question will be read without the context from the previous question(s). Thanks. \$\endgroup\$ – SamGibson Oct 11 at 4:39
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    \$\begingroup\$ @NEWbie Clarity is essential. || If THIS DIAGRAM applies to this question then you should include it. Otherwise you are wasting people's time (and your own). || You say "reverse current". Is it? Reverse relative to what? Is it measured flowing INTO the filter from the load (the 5V pulled up uController) - and is it INTO the cap or is it REALLY into the LDO. as you say. A current into the uC cannot charge the cap. A current into the cap can obviously charge it. \$\endgroup\$ – Russell McMahon Oct 11 at 5:31
  • \$\begingroup\$ @Newbie - Thanks for adding the link to the previous question. That now leads to the obvious question: What is your current circuit? (since you did not supply your current schematic). Specifically, do you still have the pull-ups to 5V, as shown in the (partial) schematic from that earlier question? If you still have the pull-ups to 5V - why are they still there? It was already explained that using those will lead to problems. It seems that this question would not be necessary, if you followed the advice already given not to use pull-ups to 5V. \$\endgroup\$ – SamGibson Oct 11 at 12:29
  • \$\begingroup\$ Yes. I have changed that. Thank you. I am experimenting with the old case to understand a bit more. Now, I tried with another fresh board with Microcontroller which is not flashed. No software loaded. And now, I am not getting 4.2V. I am getting the standard 3.3V at the LDO output. But as @Bruce Abbott said, irrespective of the ports being input/output, clamping diodes will be there. If that was the case, I should still get that 4.2V at the 3.3V LDO output even if I have not configured the microcontroller,right? Could you explain \$\endgroup\$ – Newbie Oct 11 at 13:18
  • \$\begingroup\$ @Newbie - You will need to continue that discussion with Bruce Abbott. Your current design is too unclear for me to respond. To me, you said "I have changed that" which I think means you have removed the pull-ups to 5V (since that is what I was recommending to you). However your comment to Bruce says "[...] current flows from the +5V (4.7K) pullup". Also, the question in your comment above, is different to the main question. It will cause more confusion to mix them :-( \$\endgroup\$ – SamGibson Oct 11 at 15:05
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the LDO may look like this. The only path for the 16uA is thru the feedback-loop divider resistor chain.

schematic

simulate this circuit – Schematic created using CircuitLab

Normally the opamp, itself wired in non-inverting operation because the PNP power dissipation device (that bipolar with emitter wired to Vunreg) is inverting, implements a negative-feedback servo-loop regulator-loop with the inputs to the opamp being within a few milliVolts (perhaps even 100 uV or 10uV) of each other.

But the regulator is not designed for 2-quadrant operation or 4-quadrant operation. (Kepco did make 4-quadrant power supplies; usually those are called "Power amplifers".)

The regulator expects to provide output current. As you can see, 16 UA entering the "Vout" node is too much; the output voltage divider (the feedback divider) cannot sink that much current and the opamp+PNP lose control of Vout.

The opamp output goes up close to Vunreg, shutting off the PNP because the emitter-base voltage is within 0.1 or 0.2 volts of Vunreg; you could build the opamp of bipolar transistors, and achieve that behavior.

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  • \$\begingroup\$ Thank you. Can you edit your answer and provide a little more clarity on how the feedback loop works during this condition? And I was doubtful on the voltage buildup reason. Could you explain about the voltage buildup due to reverse current and how it builds up when there is a PI filter at the output. \$\endgroup\$ – Newbie Oct 11 at 4:58
  • \$\begingroup\$ Analogsystemrf - The OP appears to be wasting you time. See this Q&A. \$\endgroup\$ – Russell McMahon Oct 11 at 5:27
  • \$\begingroup\$ @Russell McMahon - I don't want to waste others time. As you can understand from my name, I am a beginner in this field. I start to learn from the exisiting projects from people and try to understand the concepts with the existing technology that is available to me. I have seen people asking me to buy and test on easy and small microcontroller. But that is difficult due to personal reasons and due to my location. And there is a language barrier. English is not my native. Unless and until I get answers using simple words and clear basic examples, I will not understand any thing. Hope u can help \$\endgroup\$ – Newbie Oct 11 at 5:52
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    \$\begingroup\$ @Newbie - It's not my aim to make life hard for people. My apologies if I came across as too hard. My point is that IF the circuit is the one shown and discussed in your other question then not showing the circuit and not advising people of the overall situation will mislead them badly. For there to be reverse current it needs a source Voltage higher than regulator Vout. If it comes from the pullups to 5V on the processor during sleep then you are trying to solve a bad-design problem. Having people know this helps. ... \$\endgroup\$ – Russell McMahon Oct 11 at 6:31
  • \$\begingroup\$ @Newbie: ... If you provide 16 uA from a 5V source it WILL charge the LDO output capacitors and/or discharge into the regulator output. We need the overall situation to answer well. 16 uA constant current will charge a 1 uF cap from 3V3 to 5V in well under a second. Larger caps will take proportionally longer. You will need either to clamp it or stop it happening. || For interest - what country are you in (it's always interesting to know and sometimes can help us help you). I've visited 35 countries so far. (Some of these are from all over.) \$\endgroup\$ – Russell McMahon Oct 11 at 6:34

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