I want to calculate the cycle time of a single-cycle datapath. Then from the course, I know the time should be the execution time of the longest instruction, which is 'lw' in MIPS. So I try to calculate the time latency for 'lw'.
I think the longest path/time for 'lw' woud be:
PC -> I-Mem -> Read-Reg -> ALU -> Data-Mem -> Mux(to select Mem to Register) -> Write-Reg
(In the path, I think
the mux to choose read-register1 or write-register,
sing-extend for immediate value and
mux to choose read-data 2 or immediate value are all ignored, since the circuits are in parallel, they would take less time than other parts in parallel.)
But when I tried to find some solutions, there are some different answers, but none are identical to mine.
Someone said, the time/path should be:
PC -> I-Mem -> Read-Reg -> Mux(choose the input of ALU) -> ALU -> Data Memory -> Mux(select Mem to Register) -> Write-Reg
And some other versions:
PC -> I-Mem -> Read-Reg -> ALU -> Data Memory -> Mux(select Mem to Register)
I really don't know which is really the right answer. Can anyone help me to solve this problem?