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I’m trying to implement 8 bit ADC in FPGA. FPGA running at 100MHz clock. PWM signal is given to RC filter. Knowing that f=1/2piRC, I have trouble with choosing the component's value. Is there any rule to find RC values and frequency?

I chose 100Mhz frequency, 7Kohm resistor and 10nF capacitor. I didn’t‘t get expected output. I used LVDS buffer of FPGA as comparator. Considering the LVDS behavior, How to find resistor value?

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  • \$\begingroup\$ You define the frequency based on whatever rules you need to conform with to the achieve the performance you are aiming for. Nobody but you can determine that frequency. \$\endgroup\$ – Andy aka Oct 14 at 12:52
  • \$\begingroup\$ @Andyaka Thanks for the response. I would chose Fc= 100khz. Should I chose capacitor first and adjust the resistor? \$\endgroup\$ – Thanu Oct 14 at 12:56
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Usually you choose first the frequency based on the properties you want to achieve, then the capacitor and then the resistor. This is because you have less common values for capacitors and the capacitor will be the deciding form factor (how big it can be). Choosing the resistor lastly is trivial.

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  • \$\begingroup\$ Thanks for the response. I would chose Fc= 100khz. Should I chose capacitor first and adjust the resistor? \$\endgroup\$ – Thanu Oct 14 at 12:59
  • \$\begingroup\$ Yes, see my answer. Something along the lines of 10nF to 100nF. EDIT: kHz or MHz? \$\endgroup\$ – Swedgin Oct 14 at 13:06
  • \$\begingroup\$ I’m trying to track analog signal. I think , I can‘t track more than 10Khz signal. So, I would go for 100KHZ. \$\endgroup\$ – Thanu Oct 14 at 13:09
  • \$\begingroup\$ Please update your OP accordingly. At the moment it says 100MHz. Also you want to sample a 10kHz signal? Use a LPF with cutoff frequency of 15kHz and sample at 30kHz or so. No need to sample at 100kHz, minimum is highest frequency times 2. \$\endgroup\$ – Swedgin Oct 14 at 13:16
  • \$\begingroup\$ Now RC filter is designed for 100MHZ frequency. But I’m not getting expected output. Fpga running at 100Mhz clock, the output of fpga i.e., PWM signal take 256 cycles for one sample. So 2.5 micro second for 256 cycles and the frequency of it will be 390khz. Now, I need to track analog signal say from 100hz to 10Khz. So I thought to take 100khz cut off frequency. I’m not sure to what frequecy I can track, I guess not more than 10Khz. Better I will take 100khz frequency and design a new RC filter. I will take C=10nF , fc =100khz. How could I know which combination of RC is better? \$\endgroup\$ – Thanu Oct 14 at 13:54

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