# LTSpice Simulation - How to design a non ideal voltage source and limit its current?

I am trying to simulate a circuit which should pull the supply down.

The problem here is that the supply is not current limited and the whole voltage is dropping across the $$\0.1\Omega\$$ RC of Q4 and the voltage doesn't go down.

Is there a voltage component which behaves like the way I want to? Or what is the right way to simulate a pull down behaviour?

What I want to do is to shorten the supply with the GND when the transistor is in saturation.

• You cannot short out a pure voltage source without drawing infinite current. Oct 14, 2019 at 13:22
• Can you give more information about why you want to pull down the supply? There is likely a better method. Oct 14, 2019 at 13:29

You have to put some amount of resistance in series with your voltage source. The simulator is giving you an "ideal" source, while any physical source will have some nonzero amount of source resistance.

You can also add a hard current limiter made from a current source and an ideal diode:

simulate this circuit – Schematic created using CircuitLab

It depends on what behaviour your real voltage supply might have.

If your real voltage supply is a battery it has a rather good defined internal resistance. LTspice allows you to model that if you edit the parameters of your voltage source.

If your real supply is a SMPS it gets more difficult. SMPS usually have shutdown procedures on overload. This must be modeled with some basic logic circuitry, e.g. using comparators and other means. You might resort to already modeled voltage monitoring circuits, but it might turn out complicated.

The third option, i.e. having a dual mode power supply with a constant voltage operating mode, which automatically switches over to a constant current mode on overload can be modeled the way Dave Tweed desribed.

But the first measure is to find out what the characteristics of your real PSU are.