# Can the output of one logic gate serve as input to more than one subsequent logic gates?

NOT gates take one input, AND and OR gates take two inputs. But can any gate have more than one output? I've only ever seen diagrams where each logic gate has exactly one line coming out the right end.

• As in a complimentary output? You can but it would just be blocking a NOT gate together with another gate together so not too much point to draw it that way in most cases. "Gates" implies simple blocks so no need to have more than one. An adder or mux certainly has more than one output but are large enough we do not call them gates even though everything is just transistors in the end. Commented Oct 14, 2019 at 14:23
• I think what you are asking about is called "fan out". en.wikipedia.org/wiki/Fan-out
– Bart
Commented Oct 14, 2019 at 14:24
• @Bart I think he actually means discrete output terminals on a gate, not fanout Commented Oct 14, 2019 at 14:24
• The title of your question does not agree with its text. Please edit your question for clarity. Are you asking if you can connect one output to more than one following gate (yes, to an extent), or are you asking if a gate can have more than one output (yes, sort of: an old logic family called ECL and some other related technologies would put out the answer and its compliment, which made circuit design for that technology easier). Commented Oct 14, 2019 at 14:26
• I think everyone has misinterpreted the question (or rather the body of the question; The title itself is ambiguous). The OP specifically asks about a logic gate having "exactly one line coming OUT the right end", not about that single output connecting to multiple inputs of other gates. Commented Oct 14, 2019 at 18:18

There are gates such as differential drivers that offer dual outputs.
Some examples are:

.

And AM26LS31
http://www.ti.com/product/AM26LS31

• Ah okay, those are exactly the kind of diagrams that I was unable to find! So is it rare to see these types of gates? I guess you need a special type because you have to build the gate differently as to output the same voltage but over two different wires? Commented Oct 14, 2019 at 18:44
• Although there are two outputs, they are opposite in polarity and meant for high speed communication between devices. So the true answer to your question is No! Commented Oct 14, 2019 at 20:04
• The AM26LS31 RS422 driver is coupled with the AM26LS32 RS422 receiver to send data. By doing this deferentially, the transmitter and receiver can be faster and further apart. Commented Oct 14, 2019 at 20:11
• As in the comments these examples output differential signals. It is similar to having an inverter gate and a non-inverting gate operating from the same input signal. A gate having multiple outputs of an identical signal is usually not necessary, you would just connect the single output to the multiple inputs, that is what others are referring to as "fan-out", (how many additional gate inputs can be driven from a single gate output).
– Nedd
Commented Oct 15, 2019 at 14:35

Yes, one output can usually drive multiple inputs. The exact amount of how many inputs it can drive depends on the type of logic of the inputs (how much of a load it presents) and the output (how much load can it drive). Sometimes these are stated directly in datasheets, e.g. "this output can drive X standard TTL unit loads" or "this input amounts to 0.5 standard TTL unit loads". Sometimes they must be calculated from given values.

• This answer would be improved if you define or at least use the term fan-out. Commented Oct 14, 2019 at 16:10

Yes it can.

However the more gate you try to drive, the more time it takes to do so.

This is related to input capacitance and resistance.

CMOS agates have a controlled output switch resistance to each supply rail for Pch and Nch switches with RdsOn dependent on Vdd.

In general 74HC family @ 5V is 66 to 50 Ohm range +/-50% nominal while Gate input impedance can a million times higher but with some pF of capacitance for traces and Gate.

Thus the Vdc drive of number logic inputs is practically unlimited. But rise time will be reduced by RdsOn* Cout=T which is added to small internal latency delay time. This is a concern if synchronous logic is being used at high speed.

Yes. This capability is called the fan-out of a logic gate.

For example, a gate with a fan-out of 8 can drive the inputs of 8 (same family) other gates.

In the case of CMOS logic, the fan-out is generally limited by the capacitance of the load gates' inputs.

In the case of TTL, the fan-out may be limited by the load gates' input current rather than by capacitance.