NOT gates take one input, AND and OR gates take two inputs. But can any gate have more than one output? I've only ever seen diagrams where each logic gate has exactly one line coming out the right end.
Yes, one output can usually drive multiple inputs. The exact amount of how many inputs it can drive depends on the type of logic of the inputs (how much of a load it presents) and the output (how much load can it drive). Sometimes these are stated directly in datasheets, e.g. "this output can drive X standard TTL unit loads" or "this input amounts to 0.5 standard TTL unit loads". Sometimes they must be calculated from given values.
CMOS agates have a controlled output switch resistance to each supply rail for Pch and Nch switches with RdsOn dependent on Vdd.
In general 74HC family @ 5V is 66 to 50 Ohm range +/-50% nominal while Gate input impedance can a million times higher but with some pF of capacitance for traces and Gate.
Thus the Vdc drive of number logic inputs is practically unlimited. But rise time will be reduced by RdsOn* Cout=T which is added to small internal latency delay time. This is a concern if synchronous logic is being used at high speed.
Yes. This capability is called the fan-out of a logic gate.
For example, a gate with a fan-out of 8 can drive the inputs of 8 (same family) other gates.
In the case of CMOS logic, the fan-out is generally limited by the capacitance of the load gates' inputs.
In the case of TTL, the fan-out may be limited by the load gates' input current rather than by capacitance.