I have a general question about reference clocks for ethernet PHYs.
The PHYs I have seen so far require an external clock source like a xtal or other singleended clock (in addition to the clk lines used by the data transmission protocols). I assume that this reference is used for the external communication lines and internal computations.
Now I have seen some different implementations of the clock of which some are just free running generators or XTALs and others are synchronous with the internal MCU clock. And also i saw an application note which describes a pair of PHYs using the same clock which is recovered from the network using a LMK05318.
Its clear that for any serious communication, synchronization is needed. But in which way is the PHYs external reference involved, since free running clocks also work and therefore why do some applications need a synchronous clock between multiple PHYs or the MCU (the MII already has its own clk)?
My current assumption is that using a reference from the MCU is just because its already there. And sync between multiple PHYs or over network is needed for very time precision critical applications to which a free running impl could not sync itself precisely enough to.
I hope my question is clear enough. Thanks in advance