0
\$\begingroup\$

I have a general question about reference clocks for ethernet PHYs.

The PHYs I have seen so far require an external clock source like a xtal or other singleended clock (in addition to the clk lines used by the data transmission protocols). I assume that this reference is used for the external communication lines and internal computations.

Now I have seen some different implementations of the clock of which some are just free running generators or XTALs and others are synchronous with the internal MCU clock. And also i saw an application note which describes a pair of PHYs using the same clock which is recovered from the network using a LMK05318.

Its clear that for any serious communication, synchronization is needed. But in which way is the PHYs external reference involved, since free running clocks also work and therefore why do some applications need a synchronous clock between multiple PHYs or the MCU (the MII already has its own clk)?

My current assumption is that using a reference from the MCU is just because its already there. And sync between multiple PHYs or over network is needed for very time precision critical applications to which a free running impl could not sync itself precisely enough to.

I hope my question is clear enough. Thanks in advance

\$\endgroup\$

1 Answer 1

1
\$\begingroup\$

Its clear that for any serious communication, synchronization is needed. But in which way is the PHYs external reference involved, since free running clocks also work and therefore why do some applications need a synchronous clock between multiple PHYs or the MCU (the MII already has its own clk)?

PHY's (Physical Interface IC's) and clocks can be confusing, there can be several clocks associated with one PHY.

The PHY has an internal clock generated from it's oscillator (or external source with some PHY's). Some PHY's also provide an option to pipe out their clock, but are not essential to the MII interface.

The MII has it's own data clock or clocks. It can have one for TX data clocking and one for RX data clocking, this is only for data. The MII clocks run at 25 or 50MHz. RMII uses only one clock for both directions.

The MDC is a clock for the MDIO interface which is a control interface that sends commands between processor and PHY.

Ethernet itself does not need a clock for synchronization (but does have a protocol for clock synchronization)

\$\endgroup\$
2
  • \$\begingroup\$ Is the reference clock from phy to mac, generated in phy (free running) or recovered in received frames? \$\endgroup\$
    – ransh
    Commented Jan 11, 2020 at 17:31
  • \$\begingroup\$ The MII clock is generated by the master \$\endgroup\$
    – Voltage Spike
    Commented Jan 11, 2020 at 22:12

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service and acknowledge you have read our privacy policy.

Not the answer you're looking for? Browse other questions tagged or ask your own question.