I have a question about parasitic inductances. Let's take the figure below as an example, a DPT circuit is shown here. I have added an inductor (parasitic loop inductance). I would like to have a closer look at the switching characteristics of transistors. Should an inductor also be added before and after the diode as well as between diode and MOSFET in order to consider the parasitic effects of the PCB? Or is it possible to keep the parasitic inductances so low (few nH) that they have hardly any effect on the transient processes when designing such a PCB?