# Increasing the opamp gain is decreasing the DAC resolution

I want to control for example LM317 ADJ pin with a 12 bit DAC to get 1mV precision, it's an 0-5V DAC. In below schematic I increased the gain of opamp to two so I can achieve a higher voltage, but now the problem is every step is doubled as well; (5 / 4096) * 2 = 0.0024. simulate this circuit – Schematic created using CircuitLab

How can I increase the opamp gain without actually losing the DAC resolution?

• Think about what happens if you would use a 13 bit DAC instead of a 12 bit one. You want more range (distance between min and max) yet want to keep the step size. That means you need more.... – Bimpelrekkie Oct 24 '19 at 9:19
• How can I increase the opamp gain without actually losing the DAC resolution? Is that even possible? – Bimpelrekkie Oct 24 '19 at 9:20
• Increase the value of R1 to reduce the gain, or place a voltage divider (2 resistors) at the + input pin. – Nedd Oct 24 '19 at 9:21
• @Bimpelrekkie i bought three 12 bit DAC and now i have no use for them! have to switch to a 16 bit DAC then. thought maybe there was any other way... thanks. – ElectronSurf Oct 24 '19 at 9:22
• @Nedd but i don't want to reduce the gain! the whole point is to increase it... – ElectronSurf Oct 24 '19 at 9:24

Your resolution is $$\huge V_\text{Resolution}=\frac{V_{DAC_\text{output range}}}{2^{DAC_\text{bit_number}}}\times GAIN$$ it is the smallest increment you can achieve for the ADJ voltage.

To get a better resolution, you can:

1. diminishing the OP AMP gain, but won't be able to have a 0-5V range for the ADJ voltage
2. diminishing the DAC output_range (by diminishing the DAC voltage reference), but then you also won't be able to have a 0-5V range for the ADJ voltage
3. get a DAC with a higher bit number

Given your constraints (getting a 0-10V range for the ADJ voltage with a 1mV resolution) you need at least a 14-bit DAC.

Another alternative would be to use a non-inverting adder, the output then connects to the lm317 ADJ pin. For a typical op-amp adder see SE: How to design a non inverting op amp adder for my circuit?

Your DAC voltage connects at one input and you use a steady voltage reference at the other input. The voltage reference sets your lower limit and the DAC sets the offset over that value. With this method you get the full DAC resolution but only above the selected reference voltage.