I'm trying to understand this schematic of this differential probe: enter image description here

I marked some blocks. I have some questions about the block I marked "Long-tailed pair" (LTP). I have no experience with LTPs so excuse ma noob questions.

  1. I have simulated this LTP (just the LTP without all the other blocks in the schematic) in LTspice and it's bandwidth is around 26MHz. How to increase it's bandwidth (beyond 100MHz)? What are the main limitations here in this LTP?
  2. What is the purpose of BJTs (U2B, U2C) there? The only thing I could think about it is that it offloads the JFETs from the current. Is that right? Or is there another reason for that? When I remove BJTs (U2B, U2C, and their resistors R8, R9) then bandwidth increases to 52MHz. So I'm curious what is the purpose of them, because they alone halves the bandwidth.
  3. I understand that R12 and R13 are emitter degeneration resistors (or better say "source degeneration"?). Anyway, how to determine overall gain of such long-tailed pair?
  4. What is the output resistance/impedance of this LTP? Is it R14, R16 or is it R12, R13?

These are the parts I have used in simulation (LTspice does not have the exact transistors used in that schematic):
BJT 2N2222

enter image description here enter image description here

Now as I see these charts, it is weird. I considered it is a 26MHz bandwidth, but it looks like a high-pass filter. Because lower frequencies are at -13dB, and higher frequencies are at 0dB.


simulate this circuit – Schematic created using CircuitLab

  • \$\begingroup\$ What is the design aim of the circuit? What problem is it meant to solve? \$\endgroup\$
    – Andy aka
    Oct 25 '19 at 13:44
  • \$\begingroup\$ It's a diff probe \$\endgroup\$
    – Voltage Spike
    Oct 25 '19 at 15:18
  • \$\begingroup\$ @Andyaka it's a differential probe. \$\endgroup\$ Oct 25 '19 at 17:13
  • \$\begingroup\$ No, what is its intended specific use, I didn’t ask what it is, clearly and obviously it’s a diff probe but, it has some specific impedances at the input that suggest it has been designed for a specific purpose. \$\endgroup\$
    – Andy aka
    Oct 25 '19 at 18:41
  • \$\begingroup\$ @Andyaka I'm planning to make HV diff probe (like 100MHz bandwidth). I found several such projects online. This schematic belongs to one of them. My main goal is to learn. So I would like to fully understand this schematic. And understand it's limits and possibly how to increase bandwidth of it. \$\endgroup\$ Oct 27 '19 at 8:11

The bandwith of an input stage as differential pair is strongly dependent from: 1. DEVICE: each transistor has a cutoff frequency fT=gm/2/pi/Cpi/Cmu enter image description here 2. CONFIGURATION: simple differential stage has BW dependent also from impedance of current mirror you use enter image description here enter image description here

Check this book for more details https://www.amazon.com/Analog-Circuit-Design-Discrete-Integrated/dp/0078028191

For question 2 the BJT is a Vbe multiplier in my opinion is used to keep the JFET in the linear zone, becuase if it saturates then the BW collapse (you are not anymore in the linear zone)

For question 3, check the book the gain is frequancy dependend in low freq is -gm*(Rc//ro)

For question 4, I don't see where R14, R16, R12, R13 are. the output in small signal model is the same of common emitter stage normally quite large enter image description here


Your Answer

By clicking “Post Your Answer”, you agree to our terms of service, privacy policy and cookie policy

Not the answer you're looking for? Browse other questions tagged or ask your own question.