I have made this simple timing diagram that presents the triggering way of D flip flop. The flip flop is triggered by clock's rising edges. I am convinced that the diagram is correct signal-wise.

What I am worried about is the looks of it.

Do you think that it's correct timing diagram esthetics/appearence/looks-rules wise? Did I miss something?

Particularly: maybe the background net should appear only when clock/D/Q signal switches? Or not really and my diagram is fine anyway?

enter image description here

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    \$\begingroup\$ There seems nothing particularly wrong; depending on the specific device you wish to use, at the 4th rising edge of the clock the D input may violate setup time as the clock and D input appear to rise at the same time. \$\endgroup\$ – Peter Smith Oct 26 '19 at 11:25
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    \$\begingroup\$ I use slightly sloping lines to remind myself that switching is not instantaneous. Peter is correct to point out the 4th clock edge, but his 'may' is not strong enough. This will cause problems, because Q may, or may not, make the transition, and may even transition late. Always draw transitions staggered from the clock. If you can't, then you have a system design problem if you were intending to have a deterministic synchronous system. You may draw them coincident in an asynchronous system, as long as you can tolerate all three outcomes for how it switches (does, doesn't, does late). \$\endgroup\$ – Neil_UK Oct 26 '19 at 12:55
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    \$\begingroup\$ As Peter states, the transition of D & CLK on 4th rising clock is probably incorrect because it violates setup times. \$\endgroup\$ – StainlessSteelRat Oct 26 '19 at 23:53
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    \$\begingroup\$ Try wavedrom.com/editor.html it's what I use if I need draw out diagrams. \$\endgroup\$ – efox29 Nov 1 '19 at 16:26

Some pointers on timing diagram in general

  1. Removing the horizontal axis lines helps with understanding the waveform better
  2. Mark a vertical dashed line on clock rising edge (not needed on every clock edge but on important events).
  3. Make sure to show the data (D) meets both the setup and hold window of the clock by pushing it a little bit after the clock active edge
  4. In order to make it even more realistic you can always add the slew of the signal by a sloping transition as mentioned by @Neil_UK in the comments section

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