-3
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ı can not get y output for '101' detect

////////////////////////////////////////
timescale 1ns / 1ps
module detect( input  sin ,reset,clk,output reg [1:0] y

    );

     reg [1:0] next_state,p_state;

    parameter  s0 =00,s1=01,s2=10;



    always @(posedge clk or reset)
    if(reset)
    p_state <= s0;
    else p_state <=next_state;

    always @(sin or p_state)
    begin
    p_state <=next_state;
    y <= 1'b0;
    case(p_state) 
    s0: if(sin==1'b1) next_state <= s1;

    else next_state <= s0;

    s1: if(sin==1'b0) next_state <=s2;

    else next_state <=s1;

    s2: if(sin == 1'b1) begin
     y <= 1'b1; 
    next_state <=s1;
    end

    else next_state <= s0;

    default: begin
    y = 1'b0;
    next_state <= s0;
    end

     endcase
     end






endmodule
///////////////////////////////////////
timescale 1ns / 1ps

//////////////////////////////////////////////////////////////////////////////////


module testbench();
reg sin,clk,reset;
wire y;
detect uut(.sin(sin),.clk(clk),.reset(reset),.y(y));
initial
begin
clk = 1'b0;
repeat(100)
#10 clk = ~clk;
end
initial
begin
#10 reset=1;

#10 reset=0;
#10 sin=1;
#10 sin=0;
#10 sin=1;
#10 sin=1;
#10 sin=0;
#10 sin=0;
#10 sin=1;
#10 sin=0;
#10 sin=1;
#10 sin=1;
#10 sin=1;
#10 sin=1;
#10 sin=1;
#10 sin=0;
#10 sin=0;
#10 sin=1;
#10 sin=0;
#10 sin=0;
#10 sin=1;
#10 sin=0;
#10 sin=1;
#10 sin=1;
#10 sin=0;
#10 sin=0;
#10 sin=1;
#10 sin=0;
#10 sin=1;
#10 sin=0;
#10 sin=1;
#10 sin=1;
#10 sin=0;
#10 sin=0;
#10 sin=1;
#10 sin=0;
#10 sin=1;
#10 sin=0;
#10 sin=1;
#10 sin=1;
#10 sin=0;
#10 sin=1;
#10 sin=1;
#10 sin=0;
#10 sin=1;
#10 sin=1;
#10 sin=0;
#10 sin=0;
#10 sin=1;
#10 sin=0;
#10 sin=1;
#10 sin=0;
#10 sin=1;
#10 sin=1;
#10 sin=0;
#10 sin=1;
//@(posedge clk);     sequence <= 1'b0 ; 
//@(posedge clk);     sequence <= 1'b1 ;
//@(posedge clk);     sequence <= 1'b1 ;//*


end

endmodule
\$\endgroup\$
  • 2
    \$\begingroup\$ Have you noticed some issues with the question formatting? \$\endgroup\$ – Eugene Sh. Oct 29 '19 at 19:55
  • 1
    \$\begingroup\$ What is your question? \$\endgroup\$ – The Photon Oct 29 '19 at 20:03
  • \$\begingroup\$ Could you give us some context what you're trying to do? What's your objective here? Saying that your code is not outputting what you want is not enough information for us to understand why your code isn't working. \$\endgroup\$ – KingDuken Oct 29 '19 at 21:06
  • \$\begingroup\$ There are several bugs. One of the biggest being s2=10 where the simulator is reading it as decimal ten and you want binary two (aka 2'b10) \$\endgroup\$ – Greg Nov 8 '19 at 1:32
0
\$\begingroup\$

Your question is not really readable. But I looked at your code and immediately notice some major errors which, when fixed, might get your code working. AT least it wil start working better. There may be more bugs because you have not told us what your code is supposed to do.

This is wrong:

always @(sin or p_state)

In it means you code only gets execute if either sin or p_state change.
BUT! Inside the begin...end section you use a lot more variables:

p_state <=next_state; // You are using next_state!
next_state <= s1;     // You are using s1!
next_state <= s0;     // You are using s0!
next_state <=s2;      // You are using s2!

Change your code to always @( * ) it is will behave a lot better.

Secondly you are using non-blocking assignments <= in an combinatorial always section. Use = only. Thus next_state = s1 etc.

\$\endgroup\$

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