I've always considered SCK to be a unidirectional line since the master generates/transmits the clock signal and the slaves "see" the generated pulses. I have found many sources that agree with this idea via Google. However, I was reading this I2C primer/refresher by Analog and I noticed they defined the SCK line as bidirectional:
From paragraph 3: "The I2C bus uses only two bidirectional lines, Serial Data Line (SDA) and a Serial Clock Line (SCL). "
So what's going on here? Is the SCK line only bidirectional sometimes, like when there is more than one master in the I2C configuration?