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When you are drawing a schematic for an IC, and there are pins in the bottom center (in my case I am drawing for the BGM13S32F512GA-V2R), how should they be drawn?

I have looked into some beginner tutorials, but everything I've found uses ICs with pins along the side only. I am using OrCAD Capture.

I have also heard a debate between whether you draw the schematic based on the datasheet, or you draw it based on how the pins are used (GND on bottom, VCC on top, everything else on sides... or however).

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    \$\begingroup\$ Guess you should just draw schematic symbols based on their function, not based on the random shape and pinout of the package. AFAIK there was some discussion about that somewhere in here too. \$\endgroup\$ – Richard the Spacecat Oct 30 at 13:27
  • \$\begingroup\$ Okay, that seemed to be the general consensus (I found that same post) but i was unsure because I saw that it goes either way. Thank you \$\endgroup\$ – cproo12 Oct 30 at 13:43
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    \$\begingroup\$ @RichardtheSpacecat The discussion about drawing pins on schematic symbols by their function rather than physical location is here and here. Grouping pins by function makes the schematic easiest to read. \$\endgroup\$ – Nick Alexeev Oct 30 at 14:03
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    \$\begingroup\$ Consider this: you [or your layout specialist] will do the layout one time over the course of a few days to few weeks. You will be re-reading the schematic dozens of times over the course of a year or two. If you are planning to publish the schematic (open source hardware, or reference design), then it will be read a thousand times. So, draw schematics which are - first of all - readable at a glance. \$\endgroup\$ – Nick Alexeev Oct 30 at 14:11
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    \$\begingroup\$ This is probably not a chip you want to work with as a beginner. Gain some experience with easier surface mount packages having things around the perimeter only before you attempt to design with that part. The role for schematic symbols that mirror part geometry is mostly in simple things where you are trying to route on two (or even just one) layer and making schematic decisions based on anticipated difficulty of that. \$\endgroup\$ – Chris Stratton Oct 30 at 15:06
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I'll start by answering your second question. Generally you should place pins in your schematic symbol so that it produces the neatest schematic possible. Usually this means power on the top, ground on the bottom, inputs on the left, and outputs on the right.

I generally place the pin for the bottom pad logically based on its function. 9 times out of 10 the pad will be for ground, so I generally place it at the bottom of my schematic component. If it's used for the supply, I put it at the top. Simply put, just place it in the most logical location that will make your schematic cleanest and easiest to follow (usually this means minimizing wire lengths, and following the "signal flow direction").

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    \$\begingroup\$ Okay, I think I got it. My specific chip has multiple pins on the bottom (unsure what this is called- LGA? But there is no socket...) and I am going to just arrange them in the most organized fashion for my schematic. \$\endgroup\$ – cproo12 Oct 30 at 13:45
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    \$\begingroup\$ Sounds like a plan! \$\endgroup\$ – DerStrom8 Oct 30 at 14:14
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    \$\begingroup\$ Figure 5,1 in the datasheet clearly shows the 'logical' layout you might follow. How pins are physically positioned on a high density package are rarely the driver for how the schematic will look. \$\endgroup\$ – Jack Creasey Oct 30 at 15:08
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    \$\begingroup\$ @cproo12 For larger components, the chip might actually be broken out into separate symbols so you can spread the same chip across multiple schematics or sheets if necessary. For example, a large processor might have separate symbols for all its power pins, data/address pins for memory, and each GPIO port, rather than having a bunch of netnames across many sheets lead to a single sheet what is just the processor and hundreds of net names. \$\endgroup\$ – DKNguyen Oct 30 at 23:27
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    \$\begingroup\$ @cproo12 this is called a heterogenous symbol by the way, as opposed to a homogenous one, at least in OrCAD. It is chosen when you make the symbol so it can al be cordinated with the same footprint \$\endgroup\$ – DKNguyen Oct 31 at 0:09
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A schematic is not meant to be a drawing of a circuit, and shouldn't be used that way. The "pins" in a schematic just show connections. Put them wherever they need to go to make the drawing understandable, and don't worry about what they convey physically.

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The style used for creating documentation depends upon the goal of the drawing. When I create a "Schematic", I try to make the drawing useful for Troubleshooting and understanding the function; Visual likeness to reality is intentionally not part of my thinking. When drawing a "Wiring diagram", more thought goes into making the physical reality clear, especially for Enclosures, wire and cable routes. For board level drawings, I use sort of a hybrid approach where the physical layout is a small factor in that the IC's are drawn as a box and kept as 1 unit in the drawing.

The approach I would use for your question would depend again on the type of drawing I was creating. If it's a location diagram, then draw the IC as it appears in real life. If it's a schematic, the simple approach would be to draw it as a box with no regard for Physical accuracy. Then draw lines terminating at, or slightly within, the edge of the box. Add numbering either just inside or just outside the box. The lines need not be in the same order as they are on the IC. Draw them whatever way is most useful.

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The data sheet you referenced essentially answers the question, if you look at figures 3.1, 3.2, 3.3, and 7.2.

Organize your complete circuit diagram in a similar way, though (obviously) you don't need to draw the internal architecture of the chip.

This is analogous to the simpler case of drawing a transistor or FET. You use a conventional symbol, without bothering about the physical layout of the pins of any particular device. Different transistors are packaged with every possible permutation of three pins around a circle or in a straight line!

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It may be tempting to put pins in the same order as they are on the package. After all, it makes it easier to compare the schematic and the PCB.

But there is a significant danger of mistakes. Especially voltage supply pins are usually spread on all sides of the package, and may not follow any clear order. Then when you are connecting them in schematic, mixing up or forgetting some is much easier than if all VSS pins are next to each other, and all VDD pins are next to each other.

I was chasing a short-circuit under BGA chip for quite some time. Then I realized it was a schematic error with a completely different chip, which had its symbol drawn in the order the pins are on the package:

Accidentally short-circuited VDD in a row of GND pins

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