My first question is if we consider U4:A as an error amplifier (As it appears), what is the purpose to connect the inverting input of this OPAMP to the output of the 3rd order low pass filter and the non-inverting input to current sensing circuit of the battery?
The IREF input (the input of the 2nd order LPF as you've said) comes from the MCU's RA6/AN5/PGC pin. Most likely that pin outputs a PWM signal to make a DAC in conjunction with the filter block (1). The voltage coming from that DAC is used as a reference to the Current Control Error Amplifier.
Second, why have we connected THREE outputs (through R22, R19, R12) to Vref of MCP1630V?
The control circuitry consists of 2 blocks (Error Amplifiers):
Voltage Control EA (VCEA): Managed by the error amplifier composed by U3:B and its surrounding components (R11, C9, C10, etc).
Current Control EA (CCEA): Managed by the error amplifier composed by, as I've already explained above, U4:B and its surrounding components.
The outputs of these error amplifiers are connected to the VREF pin of MCP1630 through equal resistors, R19 and R22, respectively. And this pin also tied to 2.5V through a 15k pull-up resistor, R12, to set its initial voltage.
how do these outputs influence PWM output(Vext) of MCP1630V?
First, let me put the block diagram of the MCP1630V:
Second, the corresponding part of the circuit:
The block diagram of the MCP1630V in conjunction with the circuit diagram will help you to understand better how it works. Sorry, I don't have enough time to make a detailed explanation.
But here's a brief explanation:
As I have already stated above, the VREF pin of MCP1630 is tied to 2.5V through a 15k pull-up resistor, R12. And the outputs of the VCEA and CCEA are connected to this pin through equal resistors. Initially, VCEA's output is HI (5VDC) and CCEA's output is probably LO (0V). You can verify it from the schematic. So the initial voltage of the VREF pin is around 2.5VDC. It's obvious that the voltage at this pin controls the PWM output (Vext) and thus the output of the converter which is formed by ISL6207 and its surrounding components.
The CCEA and VCEA will try to keep the voltage at VREF pin at some level to adjust the PWM signal and regulate either the current or the voltage by trying to pull the VREF voltage LO or raise it to HI. Think of it as the operation of an OR gate: Whichever wins, it will regulate its input signal. For example, at unloaded state, CCEA does not work thus VCEA wins so the output voltage will be regulated.
Let me say this again: To understand how the circuit works, you do need to "read" the block diagram of MCP1630V.
(1) Fourier analysis of a PWM signal brings a duty-cycle-dependent DC component (i.e. mean voltage which is equal to duty cycle times peak voltage) and AC components (i.e. harmonics). The DC component can be varied by playing with the duty cycle, and we can get rid of the harmonics via RC filters. So we can build a non-precise DAC with PWM + RC filters. The more the cascaded RC filters, the closer to a pure DC we can get.