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I have two sheets which my ports are defined on them. I tried to use multi sheets (two copies from sheet 1 and one copy from sheet2) but I am faced with these two errors :

  1. has only one pin(Sheet4.SchDoc, Net NetU1_29 has only one pin (Pin U1-29))
  2. Nets Wire has multiple names(Sheet4.SchDoc Nets Wire CLK has multiple names (Sheet Entry U_Sheet1-CLK(Passive),Sheet Entry U_Sheet2-CLK(Passive),Sheet Entry U_Sheet5-Port1(Passive)))

I followed duplicate net names wire but these errors still available.

enter image description here enter image description here enter image description here

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    \$\begingroup\$ Try disabling "Allow ports to name nets" in the options, and explicitly label the nets on your top-level sheet using net labels connected to the wires that go to the multiple sheets. Note that you can name the nets whatever you want (within reason) on the top sheet, and those names should be applied to the nets on the lower sheet schematics. \$\endgroup\$ Commented Nov 1, 2019 at 19:16
  • \$\begingroup\$ Thank you very much for your comment. I disabled "Allow ports to name nets" option, I named each wire in my top-sheet but I still get "Net CLK1 has only one pin" error. (imgur.com/RrP8hi5) ,(imgur.com/PgyJwIs) \$\endgroup\$
    – John Jin
    Commented Nov 2, 2019 at 8:09
  • \$\begingroup\$ The pins look off-grid. Confirm that the pins of all of your parts are placed on a 100 mil grid. Make sure your pin hot-spots end up on grid. Do not use any other grid setting than 100 mils for electrical primitives, or a Bad Time may result. \$\endgroup\$ Commented Nov 4, 2019 at 13:57
  • \$\begingroup\$ I really appreciate your response. Is it important to have a 100mild grid ? because all the component are connected properly and I checked the connections. \$\endgroup\$
    – John Jin
    Commented Nov 6, 2019 at 13:19
  • \$\begingroup\$ In regards to the grid requirements: I can only relay past experiences. Maybe you should post your project, and I'll take a look at it. \$\endgroup\$ Commented Nov 6, 2019 at 18:48

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In project options make these settings: enter image description here


Add netlabels to the toplevel sheet:

enter image description here


Compile:

enter image description here


Please, use only 100mil schematic grids. You will thank me later.
The modified design files can be downloaded from here (expires in 30 days):

https://www.dropbox.com/s/ov0x0fqlfopwl0h/main_with_mods.zip?dl=0

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  • \$\begingroup\$ I really thank you for your time and explanation that you have taken and added. However, in my Altium designer, the problem exists imgur.com/YZ0FaaG \$\endgroup\$
    – John Jin
    Commented Nov 8, 2019 at 5:32
  • \$\begingroup\$ I found My problem. Thanks a lot, Isn't it dangerous to enable "Allow single pin"? is it important to label each net in top sheet? \$\endgroup\$
    – John Jin
    Commented Nov 8, 2019 at 6:08
  • \$\begingroup\$ The nets:It get confusing in the pcb if you allow Altium to automatically name nets. IMHO, it's better to specify them. It also makes it easier to detect nets that you haven't yet configured. Single pin nets:Yes, allowing this can cause mistakes to trickle through (with typos in net names, for instance). However, by checking it, the compiler assigns a net name to every singled-pin. I like this because it forces me to intentionally suppress single pin nets with a No-ERC marker. Single pins must still satisfy the rules in Project Options-Connection Matrix, adding the needed error checking. \$\endgroup\$ Commented Nov 8, 2019 at 13:05
  • \$\begingroup\$ Thank you very much for you help and what you did these days for me. \$\endgroup\$
    – John Jin
    Commented Nov 8, 2019 at 13:18

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