I've designed a circuit to choose between two 8-bit digital buses. I'm taking advantage of the fact that the 74AC540/541 chips have tristate outputs, so can enter into high impedance state to allow the other chip to drive the bus without creating a short.

Two 8-bit digital buffers with their outputs connected together

I'm using the BYPASS and !BYPASS digital lines to enable and disable each bus. These lines are controlled by a DPST mechanical switch and pull-up resistors:

Dual pole single throw switch with pull-up resistors

I'm worried about the switching operation: as the switch is toggled, I cannot guarantee that the two buffers will not be on at the same time and therefore, depending on their inputs, short their outputs together. For example, pin 2 of N2A could be LOW, causing its (inverted) output to be HIGH, whilst pin 2 on N8A might be LOW, causing its (non-inverted) output to be LOW, and creating a short between those two outputs. I imagine that switching operations with these chips are not instantaneous, and might not be matched, so there could be a situation where both chips are momentarily on during the switching operation (even with a break-before-make switch - I think).

How can I avoid shorts during this switching operation?

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  • \$\begingroup\$ Make sure you get a switch which breaks before it makes. That is a pretty common feature in switches. \$\endgroup\$ – Puffafish Nov 6 '19 at 8:28
  • \$\begingroup\$ use an SPDT switch to enable one or the other buffer \$\endgroup\$ – jsotola Nov 6 '19 at 8:30
  • \$\begingroup\$ What about any slight differences in switch-on and switch-off time of the two buffers? Could it not be the case that for a suitably fast switching operation, the buffers are both momentarily still enabled and can thus produce a short between their outputs? \$\endgroup\$ – Sean Nov 6 '19 at 8:55
  • \$\begingroup\$ I've thought about it a bit more. I think the combination of pull-ups on the switch lines and the fact that the switch will break before make, with the transition of the order milliseconds, will avoid any shorts. During the transition from one switch state to the other, both buffers will have their !OE pins set HIGH, which puts their outputs into high impedance mode, so there are no shorts. Any capacitance at these pins will be negligible, creating delays of probably nanoseconds and not milliseconds like the switch, so I'm pretty sure my circuit will work. Thanks @Puffafish and @jsotola! \$\endgroup\$ – Sean Nov 6 '19 at 11:12

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