The memory is byte addressable, and the 16-bit bus transfers two bytes at a time.
But the total capacity is still just 1 MB.
The diagram is a bit misleading in this regard — it should show only A19-A1 going to both banks. A "bank" refers to 8-bit wide memory, and one or both banks are accessed as described in the table. They're trying to show that the left bank (D15-D8) is enabled only when BHE- is low, and the right bank (D7-D0) is enabled only when A0 is low.
So yes, when stepping through memory (such as when prefetching instructions), the bus address increments by two.
However, note that 8086 instructions are anywhere from 1 to 6 bytes long, and that's what determines the actual IP increment. The 8086 reads instructions from a 6-byte prefetch buffer (4 bytes on the 8088), and the logic that fills that buffer uses its own address register that is distinct from the IP.