What happens to remaining 12 segments in 8086

8086 can access DS, CS, SS, ES which takes max size of 4*64KB. Then what happens to remaining 12*64KB. How is it utilized.

• You are starting from a mistaken idea, the 8086 has 65536 segments, not 16. To access a segment that doesn't currently have a segment register assigned, you can do something like temporarily reassign one (there may be other ways at well, it has been a long time and there is little reason to consider that architecture today) In some cases the overlap may mean you can reach the data at a different address in a current segment. Nov 11, 2019 at 14:49
• It looks like maybe you don't understand how the 8086 addresses memory? Segments are 64KB, and overlap on 16-byte boundaries. Basically, the address is (index register + 16 * (segment register)). Nov 11, 2019 at 15:43
• @ChrisStratton given the time of year and the number of 8086 questions, I suspect that it is still used as a teaching tool in somebody's standard curriculum, and hence "relevant" in the sense that folks need it to pass their classes. It does seem an odd choice, since the whole 8086 segmentation scheme was odd even when it was shiny-fresh. Nov 11, 2019 at 15:45
• The segment scheme made sense as a way to easily port 8/16-bit programs to run in what could almost be considered weak virtual machines in a 20-bit address space. But those who continue to teach workarounds for late 1970's small hardware limitations are doing their students a huge dis-service. Someone should make a nice little DIP adapter to drop an ARM MCU in the socket on those aging lab boards and get their students back on the logical track from 1950's and 60's big iron ideas to modern universal ones, a path from which 1970's PC architectures were a momentary diversion. Nov 11, 2019 at 15:57

The 8086 has 16 bit addresses internally which are combined with their segment register, code (CS), data (DS), stack (SS), and, to stay on 4 bits, an extra segment (ES). The pinout of the 8086 has 20 address lines. So you are right that the maximum address space of the 8086 is 2^20/1024 = 1024 kB = 1 MB.

While these 4 segment registers (CS, DS, SS, and ES) are also 16 bits they are only shifted up 4 places and then added. If you keep all these segment registers fixed, you can have a program using 64 kB, a stack of 64 kB, manipulating data of 64 kB. Most likely you would want more data, so you can use the ES explicitly in MOV instructions.

But then you can of course change the segment registers, and because of the way they are shifted, you can create overlapping "windows" into the memory, scrolling along the full size of the total memory.

In your question "what happens with the remaining memory, how is it utilized" therefore you ignored that you can change the segment registers scrolling along the entire available physical memory. So it's not really "the remaining memory" as you can access it all, it's just more complicated as if you had full 20 bit registers internally.

It's all up to the OS (or you, if you just use the 8086 bare-bones) to decide how to utilize these segments.

Another thing to keep in mind for the history of the most famous 8086 system, the IBM PC, there was a physical address maximum of 640 kB. So not even that 1 MB that the CPU could theoretically address was actually available.

PS: Note, while one may dismiss this architecture as outdated, in the 32 bit world the same situation came along quickly, as the 4 GB address space for full 32 bit addresses was quickly felt too small. It seems like history always repeats itself. First addresses are n bits, then some extension mechanism is added, but the physical memory is less than the theoretical address limit, then people max it out, then the address bus gets wider, less memory being standard, then the memory maxes out and people want extension mechanisms. These is always that sentiment that "4 kB should be enough" or "640 kB is enough for what anyone ever would want" (Bill Gates reportedly said something like that). And so, if today we hear that 64 bit is the end of history, we only have to look at new, wider 128 bit data types and large 10 TB data systems to see that soon the 64 bit pointer is hitting the limit again. This is why IMO it isn't at all futile to think about past CPUs with their smaller word widths. (I am personally currently building a 4-bit computer prototype, with address extension of course.)