Short version (can provide more information if wanted) we have a display (TFT with TTL driver) that we control via PIC32 and Epson Display IC. The supplier changed their driver which should have been a drop in replacement, through some troubleshooting and testing we found the reason it did not work on our system was a capacitor we have on the clock line going from our driver to theirs.

Unfortunately there aren't any notes as to why that capacitor is there, my assumption is noise mitigation, or emissions mitigation.

Layout is Clock out -> 27 ohm resistor -> 27 ohm resistor and a 100 pF cap connected between them to ground:

See layout here, from our chip to the left, going to theirs on the right.

Taking measurements the only difference that I could see was the voltage was a little lower with the capacitor there. With capacitor: With 100pF cap 1.9v p-p

Without capacitor: Without 100pF cap 3.3v p-p

I'm guessing the new display is just more sensitive to voltages on the clock, so I'm not too worried about that being the reason it works. I'm just not sure aside from emissions testing how I can confirm that capacitor is for noise mitigation rather than emissions.


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    \$\begingroup\$ It can also be a way of shifting the phase of the edge. e.g. to make sure the set-up and hold times are met. \$\endgroup\$ – Oldfart Nov 11 '19 at 16:46
  • \$\begingroup\$ that 3--5 nanosecond delay ... \$\endgroup\$ – analogsystemsrf Nov 11 '19 at 16:54
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    \$\begingroup\$ It's also ~700mV above ground with the cap. The new display may have different \$Vil\$ and \$Vih\$ requirements. \$\endgroup\$ – Aaron Nov 11 '19 at 17:22
  • \$\begingroup\$ Can you confirm that is 5V logic driver using Vdd= 3.3V? \$\endgroup\$ – Tony Stewart Sunnyskyguy EE75 Nov 11 '19 at 17:52
  • \$\begingroup\$ @Oldfart I hadn't thought of that, it is possible that the old driver needed a slight time shift between clock and data. \$\endgroup\$ – GreenGiant Nov 11 '19 at 17:56

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