Staying within an op amp's specified output voltage range, how does a difference in output swing affect the op amp's noise applied to the output signal? Obviously by increasing gain, we amplify the op amp's injected noise as well, but in practical applications, is this a perfectly linear increase?

For context, I am looking at designing a transimpedance stage for the differential current-output DAC PCM1794A. At the output, it sources between 2.3mA and 10.1mA, with a center current "zero" of 6.2mA. I'd like to minimize added noise, and I will need two identical transimpedance stages to bring to a differential summer in order to receive a single-ended signal at the circuit's output (snip from the datasheet below).

Why would the reference schematic's designer not maximize the gain of the transimpedance stage? Conversely, why would it not be lower? From other posts and articles I've read (here for example), assuming identical noise figures from each op amp (which will never happen, but assume I at least plan to use identical op amps for all stages in my circuit), it seems like it would be best to try and form the circuit such that each amplifier's gain is the same to achieve the desired output voltage (in this case 4.5Vrms). To add to my confusion, there is another example in the datasheet that, among other things, replaces R3 with a 560-ohm and R5 with a 270-ohm (in addition to R4 and R6), negating the desire for a differential summer with input coefficients being 1.

Also, would there be any benefit to biasing the transimpedance stages such that the "zero" output of the DAC resulted in 0V at the output of the transimpedance stage? Seems to me that this would be unnecessary since both signals go through the differential summer together. I would also think that this would produce more noise as a result of deriving the bias voltage, but they do just this in TI Application Report SBOA237.

Thank you, I'm just trying to wrap my head around the "practical theory" here.

PCM1794 output

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    \$\begingroup\$ You have a lot of questions here. I recommend you read the chapters on noise of the excellent book "The Art of Electronics" from Paul Horowitz and Winfield Hill. \$\endgroup\$ – joribama Nov 14 '19 at 7:29

In terms of practical theory, all components have the ability to add noise, from reacting to external (emi) and internal (heating) sources of input you don't care for. Nothing changes instantaneously so everything has some frequency-related characteristics.

As a general guess, yes several identical stages do tend to result in lower noise than something producing the same overall equivalent but with stages at the extremes. This has to do with how extremes tend to produce less consistent results, and ultimately how entropy works. But on top of that you can consider noise picked up in transmission, which promotes the idea that you want to strengthen a signal as much as close to the source as possible (before it picks up lots of noise). However for specific signals at specific frequencies, you can potentially get better results by amplifying the desired frequencues more than the arbitrary ones. Some per-stage (for tuning) and overall bode plots can assist in figuring out what signals you are aiding and rejecting.

For biasing, think how that affects the charge on the capacitors that are used to represent the same input states- in other words how small noise currents might affect the signal.

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You are seeking the largest possible dynamic range, bounded by thermal noise floor at lower levels, and with distortion (possibly also SlewLimiting) at the upper levels.

When you double the Vout of an opamp, the input differential_pair distortion will soar (2nd order product double, 3rd order products quadruple) because millivolts of differential input voltage is required at high frequencies.

With 10MHz GainBandwidth, and 20KHz signal frequency, you only have 500:1 to work with. With 10 volts output, the [VIN+ - VIN-] === 20 milliVolts. This amount of differential voltage into a diffpair is well into the highly nonlinear region for a bipolar non_R_in_emitter_degenerated diffpair; only the 500:1 gain margin suppresses the distortion at 20KHz.

Another issue at upper levels of voltage swing is Power_Supply_Crosstalk, with the shared VCC and VEE rails. The opamps, because of internal stages operating on small quiescent currents, will have imbalanced internal node voltages at higher frequencies, and the imbalances introduce what appears as Power Supply Rejection Ratio failure at the higher frequencies.

[I notice the TI datasheet for NE5534 does not provide PSRR versus frequency plot.]

Doubling the I_load will double the rail collapses; with 10mA from 0.1uF for 25 microSeconds (20KHz squarewave), the delta_Rail dV = I * dT/C = 2.5 volts.

Thus the sharing of rails is not a good idea for 24_bit performance. I suggest you introduce a tree_filtering mindset, where YOU isolate the opamp rails and provide high frequency charge_provisioning.

Introduce some 10 ohm resistors in each of the 6 (2 * 3) power rails, have a central 100uF capacitor on both VCC and VEE, and increase the capacitors at each opamp to 1uF or 10uF (which reduces the rail collapse at 20KHz and 10mA to 0.25 or 0.025 volts respectively).

Like this


simulate this circuit – Schematic created using CircuitLab

Notice these are issues arising from LARGE output voltages and currents, not at all concerned with a microvolt RMS of total integrated noise voltage over an audio bandwidth from various 1Kohm (SWAG) contributors.

The NE5534 has an Rnoise of about 1Kohm (producing flat noise density of 4 nanoVolts RMS/rtHz.

The 820 ohm Rfeedback also introduces about 4 nanoVolts RMS/rtHz.

Ignoring Inoise_bias_current, you have rss(4 and 4) or 4*1.4 = 5.6 nanoVolts.

The complementary NE5534 boosts this, with its statistically independent electron movements, by another 1.414X to 8 nanoVolts RMS.

Your LT1028 has an Rnoise of about 50 ohms (0.85 nanoVolt RMS/rtHz), thus reducing the gain_set resistors down and down and down makes Sense, except the NE5534s have ALREADY set the noise floor.

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