# Regarding RC Phase Shift Oscillator

I have been studying RC phase shift oscillators and I have the following questions:

• Why does the oscillation stop when loop gain becomes less than 1 and why is clipping observed when loop gain exceeds 1?

My understanding is that the clipping occurs because too high a voltage kicks the device into the non linear region and thus the clipping. Please correct me if I'm wrong. I have no clue why a loop gain of less than unity stops the oscillation.

• Which phase shift network is preferred, low pass RC network or high pass RC network?

Given a RC phase shift oscillator, the low pass filter would do the same job as that of a high pass filter. So which one would be preferred?

• The frequency of oscillation is given by the formula

and the phase shift formula is given by

If we substitute the value of frequency in the phase shift formula to find phi, we get 67.79 degrees which means that the total phase shift will be 203.37 degrees, which is not what the required phase shift value (required is 180 degrees). How does the circuit still produce oscillations?

The system theory provides an answer to the question (pole location, quality factor, solution in the time domain,....) .

However, without going deep into system theory, the questions can be answered as follows:

A.) Loop gain LG=1 means that the damping in the feedback path is fully compensated by the gain of the active element within the loop. That means: The amplifiers input signal Vin produces an amplifier signal at the ouput Vout which will be attenuated by the feedback network exactly down to the level Vin. (The amplifier produces its own input signal in conjunction with the feedback path). However, this must apply to one single frequency only.

(a) Note that LG=1 means: |LG|=1 and phase(LG)=0

(b) For LG<1, the gain is not large enough for compensating the attenuation of the feedback path - and the oscillation amplitude (if existent) will continuously decrease.

(c) For LG>1, the opposite will happen and the amplitude will continuously increase until it will be limited by the hardware (supply voltage).

(d) Very often, such a hard-limiting is not desired (harmonic distortion) and an additional non-linear element is used for "soft-limiting" (diodes, FET as controllable resistance) .

B.) Lowpass vs. Highpass.

As always in electronics, each solution has some advantages and some disadvantages. Therefore, depending on some application-oriented requirements a tradeoff is necessary.

(a) Three lowpass R-C sections: The lowpass provides attenuation of harmonics produced in the amplifier. However, the input resistor Ro of the inverting amplifier loads the last R-C section and must be included in the calculation.

Solution: (1) Ro>>R, (2) Additional buffer amplifier, (3) Best solution: Only two R-C sections and one inverting integrator instead of an inv. amplifier.

(b) Three C-R highpass sections: The last (grounded) resistor (Ro) can be combined with the input resistor of the following inverting amplifier (gain: - Rf/Ro). Hence, no loading error caused by the amplifier. However, the highpass network is noise-sensitive and cannot provide damping of harmonics.

C.) Regarding the phase: Three R-C (resp. C-R) sections are required to allow a total phase shift of 180 deg at one single finite frequency (the inverting amplifier gives additional 180deg phase shift to fulfill the oscillation criterion with 360 deg). It is not allowed to use a formula which applies for one single unloaded stage only. We even cannot say that each section would provide 60 deg to the overall phase shift of 180deg. This would be only true in case of isolating the sections from each other.

• Excellent answer. Thanks for taking time to write this long answer. Do you mean that phase shift offered by each network varies because they are loaded differently from one another? Nov 17, 2019 at 12:33
• The chain of three R-C units must be considered as one single network which has certain frequency-dependent properties - amplitude damping and phase shift. Hence, it makes no sense to split it up into three separate blocks because the transfer functions of each block would not be independent on the source and load impedances. We can calculate the transfer function of the whole network and find the attenuation and the frequency where the total phase shift is 180 deg. - what else do we need?
– LvW
Nov 17, 2019 at 14:25
• Then what does the phase shift corresponding to the oscillation frequency indicate? As I showed in the post, the phase shift turns out to be 67 deg. What does this 67 deg indicate? Nov 17, 2019 at 17:26
• Question: You have "calculated" a phase shift - may I ask you: What is the meaning of this value? Which kind of phase shift - which circuit belongs to this phase shift of 67 deg? Can you explain the formula you have used?
– LvW
Nov 18, 2019 at 9:34

Suppose your circuit should oscillate at 10,000 Hz. We'll assume a noise bandwidth of 10,000Hz.

Suppose the effective noise resistance is 1,000 ohms. That suggests your random noise floor will be 4 nanoVolts/square_root_Hertz, where the square_root_Hertz reminds us that the noise voltage increases by squareroot of the bandwidth.

In 1Hz bandwidth, you'll have about 4 nanoVolts RMS noise.

IN 10Hz bandwith, you'll have about 4 * sqrt(10) = 12 nanoVolts RMSnoise.

In 100Hz bandwidth, about 4 * sqrt(100) = 40 nanoVolts noise.

In 1,000Hz bandwidth, about 120 nanoVolts

In our assumed 10,000 Hz bandwidth, you'll have about 4 * sqrt(10,000) = 400 nanoVolts RMS noise.

Your oscillator will, on power up, have this 400 nanoVolts random noise PLUS major power-rail-induced glitches as stimuli to the feedback loop.

Using a digital scope, trigged by the power rail, use a low-bounce switch in the rail (any toggle switch will do fine), and record the buildup of oscillation, as the randomness of the noise and the (possibly huge spike of VDD onset) is modified by the requirement of oscillation:

1) exactly 360 degrees phase shift around the loop

2) at least a voltage gain of 1.0000

Have fun.

• @analogsystemsrf...I suppose you are speaking of "loop gain" (at least 1.0000), correct?
– LvW
Nov 18, 2019 at 9:38