I have built a custom stm32f429 board. It uses SPI, I2C, UART and CAN for communication with various sensors. This is my first stm32f429 board, i've designed boards around stm32f3 and f1 series before. I'm using SWD interface via the stlink-v2 debugger/programmer. The STLink utility recognizes the board without any issues and i can even program the chip with STLink. stlink detects the board program OK

However with openocd the board is detected without any issues, but i run into the following error when doing a "reset halt" from the telnet session. enter image description here

"target stm32f4x.cpu not halted"

Following are the openocd commands i use:

openocd -f ~/openocd-0.9.0/tcl/interface/stlink-v2.cfg -f ~/openocd-0.9.0/tcl/target/stm32f4x.cfg 

In a separate window

telnet localhost 4444

My initial diagnosis was that this is definitely related to the NRST circuitry. So i checked if PDR_ON is connected to Vdd since according to AN4488, if PRD_ON is pulled to GND the internal power on reset and power down reset circuitry is disabled. PDR_ON voltage is 3.275V, which is the same for all VDD pins. VCAP1 and VCAP2 are at 1.132V and i'm using 2.2uF caps on VCAP pins. External reset circuit is pretty simple. I have attached the relevant snapshots of the schematic here for reference. Please do let me know how to proceed with further diagnosis or if i've missed something in the design of the board.

stm32f429_circuit enter image description here

P.S PDR_ON is connected to Vdd. In the schematic it is left unconnected.

  • 1
    \$\begingroup\$ Why NRST is hardwired to VDD? It may not work because of this. Pushing reset button will also just short VDD to GND. The debug adapters have various ways of resetting the MCU, with the hardware pin or via JTAG/SWD. \$\endgroup\$
    – Justme
    Nov 17, 2019 at 12:50
  • \$\begingroup\$ Hey thank you very much for pointing that out. No wonder the soft reset wasnt working. While holding the reset button i noticed the surge in current drawn but it didn't even occur to me to check the NRST schematic again :P. \$\endgroup\$
    – Asusrog
    Nov 17, 2019 at 15:27

1 Answer 1


NRST pin is hardwired directly to VDD so not all ways to reset the MCU core are available.


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