0
\$\begingroup\$

I want to draw a state diagram about the sequence detector circuit. The circuit will generate a logic “1” output is a sequence of 11 or 1001 is received. I have my answer, but I don't know my answer whether correct. Please help me check.

enter image description here

New result here: enter image description here

\$\endgroup\$
6
  • 1
    \$\begingroup\$ Looks right.... \$\endgroup\$
    – Mitu Raj
    Nov 18, 2019 at 10:07
  • \$\begingroup\$ This would fail to detect the "1001" subsequence of "11001". \$\endgroup\$
    – Hearth
    Nov 18, 2019 at 14:14
  • \$\begingroup\$ How can I change it? \$\endgroup\$
    – JoJo
    Nov 18, 2019 at 14:37
  • \$\begingroup\$ how about my new state diagram? Is that correct? \$\endgroup\$
    – JoJo
    Nov 18, 2019 at 15:19
  • \$\begingroup\$ Do you need to write this as a state machine? Because you describe a 4 bit shift register with 2 comparators. \$\endgroup\$
    – DonFusili
    Nov 18, 2019 at 15:20

1 Answer 1

0
\$\begingroup\$

Your second state machine is correct.

10&1001 State Machine

\$\endgroup\$
2
  • \$\begingroup\$ Hi @stainlesssteelrat may i know the tool you used to draw the FSM \$\endgroup\$ Mar 27, 2020 at 5:27
  • \$\begingroup\$ I believe it is DIA. \$\endgroup\$ Mar 27, 2020 at 9:50

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service and acknowledge you have read our privacy policy.

Not the answer you're looking for? Browse other questions tagged or ask your own question.