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My gut tells me so, but the proof eludes me. Effectively this output is the AND of all four bits. These four bits go from 0 to 1 at very distinct times, assuming the counter is running at a reasonable clock rate. From this, I assume that the TC output's transition from 0 to 1 is safe. But what about the other way? When the counter rolls over and all bits go from 1 to 0, may I assume that TC makes a glitch-free transition from 1 to 0 as well? I sense that I'm missing some elementary rule of thumb here.

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  • \$\begingroup\$ Speaking cynically, I don't think you can trust it to not glitch. However, if you follow the data sheet recommendations for clock rates you can trust it to have settled out when the next clock pulse comes along. So I wouldn't try to clock something from the RCO, but I'd certainly trust it to be used as it was intended. \$\endgroup\$ – TimWescott Nov 18 '19 at 19:50
  • \$\begingroup\$ there will be propagation delays of Clock to Qout. Respect those numbers. \$\endgroup\$ – analogsystemsrf Nov 18 '19 at 23:18
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No, I don't think you can assume it will be glitch free.

The problem is not that the expected low to high and high to low transitions will be glitchy, in fact those transitions are likely to be glitch-free.

The problem rather is that the output may briefly glitch high during counting. For example during the transition from 1101 to 1110 if the units flip-flop is slightly slower than the twos flip-flop then the data outputs may briefly be 1111 and thus the TC/RCO output may briefly go high.

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  • \$\begingroup\$ Thanks Peter - Ugh. Yes, of course. Ought to have thought of that! \$\endgroup\$ – Aaron Nov 18 '19 at 23:58
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I'm assuming that you are referring to RCO, the ripple-carry output, rather than TCO.

No, you can not assume that it is glitch-free. In fact, the Texas Instruments datasheet says

counting spikes may occur on the (RCO) ripple carry output

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  • \$\begingroup\$ Nope, not the RCO. The '163 is a sync counter. \$\endgroup\$ – Aaron Nov 18 '19 at 17:24
  • \$\begingroup\$ @Aaron Synchronous counters can still have a ripple carry output. \$\endgroup\$ – Hearth Nov 18 '19 at 17:29
  • \$\begingroup\$ Thanks, Heath. Let me scope the question further to the '163 in that case, as it's the part I'm working with. I don't see mention of spikes/glitches in the docs for this part, and the output for the '163 parts seems to be universally referred to as TC or TCO. \$\endgroup\$ – Aaron Nov 18 '19 at 17:34
  • \$\begingroup\$ The naming seems to vary, ti.com/lit/ds/symlink/sn54ls161a-sp.pdf uses RCO, assets.nexperia.com/documents/data-sheet/74HC_HCT163.pdf uses TC for the same signal. \$\endgroup\$ – Peter Green Nov 18 '19 at 21:13

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