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For one of my current projects, I am designing a small data acquisition board. However, I am currently not sure about the overall layout of the board.

Here are 2 possible variants I came up with. First of all, the position of the connectors is necessary for these positions, due to mechanical constraints. enter image description here

My question is actually regarding the position of the I2C expander and its position. The LED's it drives have to be in this position for visibility. The I2C expander has to be powered by the digital supply. The state of the LED's will not change during data acquisition and also the I2C bus will not have to transmit any data during the acquisition.

So here are my questions:

  1. which of the 2 layouts is better in terms of EMI / radiated emissions?
  2. For the case, that the LED state does not change during acquisition, do I have to expect any other negative effects on the ADC due to the constant LED currents / I2C expander quiescent currents?
  3. If 1 and 2 are both not optimal, what have I missed and how could I arrange it better?
  4. For case 2, would it be better to have the GND left unconnected on 1 side of creating a loop with the analog plane in the middle? enter image description here

The ADC I'm planning to use is an ADS8881 - Product page - Datasheet

The MCU I'm planning to use is an STM32F103 - Product page

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  • \$\begingroup\$ Reminds me of these videos: youtube.com/watch?v=ImkvsQEY6OY but you're probably way ahead of that level already. \$\endgroup\$ Commented Nov 21, 2019 at 11:57
  • \$\begingroup\$ Actually, I know that one from some years ago :). Maybe my pictures are a bit inspired by it. \$\endgroup\$ Commented Nov 21, 2019 at 12:52
  • \$\begingroup\$ More data is needed here. Are we talking about a GHz processor with 24-bit ADCs or a 10 Mhz processor with 8-bit ADCs? What is the minimum frequency of interest? Generally split planes are not recommended nowadays, because they can resonate and form parasitic patch antennas. Read this: incompliancemag.com/article/introduction-to-em-engineering \$\endgroup\$
    – user110971
    Commented Nov 23, 2019 at 17:31
  • \$\begingroup\$ Somewhere in the middle. I should have mentioned that. It's an ADS8881 - 1MSPS / 18bit resolution. As for the MCU, I'm planning with an STM32F103 \$\endgroup\$ Commented Nov 24, 2019 at 2:05

2 Answers 2

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1) Initially routing diagram 2 is the better of the two.

2) It is always best to avoid running digital lines (or their ground returns) close to or over ADC lines, even if they are considered constant or slow. There can often be moderate levels of digital noise even on stable digital lines.

3) Consider moving the IO-expander right up against the MCU to reduce high speed trace lengths.

Widening the cutout lines between the two ground planes would better isolate the digital and analog signals and reduce potential noise transfer.

If the digital supply is a switcher type consider moving it further away from the analog supply components.

You might even try to keep the analog ground separated all the way back to the main power entry point or the filter components of the analog supply. Connect the two grounds at only one point.

To minimize radiated emissions reduce the length and loop size of all high speed signals, minimize the number of sharp angles in traces with high speed signals.

Keeping the analog input lines short and direct can help reduce noise. However this might be a compromise if the ADC uses a serial interface (with longer high speed lines).

4) No.

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Why not reposition components to make life easier. Reposition the components such that the return currents do not cross the analogue or digital domains.

A flow like below would ensure the digital noise into the analogue domain is kept to a minimum. Suitable placement of ferrite beads and 10nF capacitors will help.

enter image description here

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  • \$\begingroup\$ Good point / idea. aktuelly this could work. Let me check some more details \$\endgroup\$ Commented Nov 23, 2019 at 12:47
  • \$\begingroup\$ Sorry, it took a little bit longer to check it. Actually this is working out perfect. \$\endgroup\$ Commented Dec 3, 2019 at 7:45

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